drm_dp_pcon_pps_default(9)
π¦ NAME
drm_dp_pcon_pps_default β the β¨iconicβ¨ little helper that lets the PCON go ahead and fill in the default pps parameters for DSC1.2 between the PCON & the HDMI2.1 sink. No cap, that's literally her whole job π
π SYNOPSIS
int drm_dp_pcon_pps_default (struct drm_dp_aux *aux );
πΈ ARGUMENTS
auxβ the DisplayPort AUX channel, bestie. That's the one little thing she needs from you π«Ά
π DESCRIPTION
Okay so this is genuinely the simplest queen in the whole file: she returns 0 on success, and if things don't slay she returns a negative error code π That's it. That's the whole vibe check.
ngl, if you get anything negative back, that's your cue to go debug β no cap.
π SEE ALSO
Lives in the kernel file ./drivers/gpu/drm/display/drm_dp_helper.c alongside dp helpers(9) β and honestly? The whole friend group shows up here. Every single one, in order, no skips π
π the helpers & the AUX-adjacent girlies
dp helpers(9)drm_dp_phy_name(9)drm_dp_lttpr_wake_timeout_setup(9)dp helpers(9)drm_dp_dpcd_probe(9)drm_dp_dpcd_set_powered(9)drm_dp_dpcd_set_probe(9)drm_dp_dpcd_read(9)drm_dp_dpcd_write(9)drm_dp_dpcd_read_link_status(9)drm_dp_dpcd_read_phy_link_status(9)drm_dp_link_power_up(9)drm_dp_link_power_down(9)drm_dp_dpcd_write_payload(9)drm_dp_dpcd_clear_payload(9)drm_dp_dpcd_poll_act_handled(9)
π¦ downstream detective work
drm_dp_downstream_is_type(9)drm_dp_downstream_is_tmds(9)drm_dp_send_real_edid_checksum(9)drm_dp_read_dpcd_caps(9)drm_dp_read_downstream_info(9)drm_dp_downstream_max_dotclock(9)drm_dp_downstream_max_tmds_clock(9)drm_dp_downstream_min_tmds_clock(9)drm_dp_downstream_max_bpc(9)drm_dp_downstream_420_passthrough(9)drm_dp_downstream_444_to_420_conversion(9)drm_dp_downstream_rgb_to_ycbcr_conversion(9)drm_dp_downstream_mode(9)drm_dp_downstream_id(9)drm_dp_downstream_debug(9)drm_dp_subconnector_type(9)drm_dp_set_subconnector_property(9)drm_dp_read_sink_count_cap(9)drm_dp_read_sink_count(9)
π§ AUX init & register era
π psr, crc & descriptors
drm_dp_psr_setup_time(9)drm_dp_start_crc(9)drm_dp_stop_crc(9)drm_dp_read_desc(9)drm_dp_dump_lttpr_desc(9)
π the DSC squad (her actual department, lowkey)
drm_dp_dsc_sink_bpp_incr(9)drm_dp_dsc_slice_count_to_mask(9)drm_dp_dsc_sink_slice_count_mask(9)drm_dp_dsc_sink_max_slice_count(9)drm_dp_dsc_sink_line_buf_depth(9)drm_dp_dsc_sink_supported_input_bpcs(9)drm_dp_dsc_sink_max_slice_throughput(9)drm_dp_dsc_branch_max_overall_throughput(9)drm_dp_dsc_branch_max_line_width(9)
β LTTPR gang
drm_dp_read_lttpr_common_caps(9)drm_dp_read_lttpr_phy_caps(9)drm_dp_lttpr_count(9)drm_dp_lttpr_max_link_rate(9)drm_dp_lttpr_set_transparent_mode(9)drm_dp_lttpr_init(9)drm_dp_lttpr_max_lane_count(9)drm_dp_lttpr_voltage_swing_level_3_supported(9)drm_dp_lttpr_pre_emphasis_level_3_supported(9)
π₯ phy test patterns & sdp things
drm_dp_get_phy_test_pattern(9)drm_dp_set_phy_test_pattern(9)drm_dp_as_sdp_supported(9)drm_dp_vsc_sdp_supported(9)drm_dp_vsc_sdp_pack(9)
π«Ά PCON & FRL (her direct coworkers, fr fr)
drm_dp_get_pcon_max_frl_bw(9)drm_dp_pcon_frl_prepare(9)drm_dp_pcon_is_frl_ready(9)drm_dp_pcon_frl_configure_1(9)drm_dp_pcon_frl_configure_2(9)drm_dp_pcon_reset_frl_config(9)drm_dp_pcon_frl_enable(9)drm_dp_pcon_hdmi_link_active(9)drm_dp_pcon_hdmi_link_mode(9)drm_dp_pcon_hdmi_frl_link_error_count(9)drm_dp_pcon_pps_override_buf(9)
πΈ backlight besties
drm_edp_backlight_set_level(9)drm_edp_backlight_enable(9)drm_edp_backlight_disable(9)drm_edp_backlight_init(9)drm_panel_dp_aux_backlight(9)
π bandwidth math (the main character energy)
drm_dp_link_symbol_cycles(9)drm_dp_bw_overhead(9)drm_dp_bw_channel_coding_efficiency(9)drm_dp_max_dprx_data_rate(9)
okay that's the whole page, bestie β go forth and set those pps defaults πβ¨
source/version: ./drivers/gpu/drm/display Β· dated October 2026 β mwah, written from the dp helpers section, xoxo ππ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms