drm_dp_dpcd_..._link_status(9)
π drm_dp_dpcd_..._link_status(9) β from the Kernel API Manual, bestie β¨
okay so before we even start: this page lives in the Kernel API Manual, section 9, and the whole thing is literally called drm_dp_dpcd_..._link_status. yes the ... is part of the name, no i will not be elaborating, that's just how it is. π
β¨ NAME β¨
drm_dp_dpcd_read_phy_link_status β bestie, this is the one that goes and gets the link status info for a DP PHY π¦
πΈ SYNOPSIS πΈ
int drm_dp_dpcd_read_phy_link_status (struct drm_dp_aux *aux , enum
drm_dp_phy dp_phy , u8 link_status[DP_LINK_STATUS_SIZE] );
like, that's the whole signature, copy it exactly, no notes π
π ARGUMENTS π
auxβ the DisplayPort AUX channel, your little messenger π§dp_phyβ the DP PHY you want the link status for, i.e. which PHY, be specific bestielink_statusβ the buffer where the status gets returned,u8 link_status[DP_LINK_STATUS_SIZE], ok so this is where the tea gets poured π
π DESCRIPTION π
So what does it actually do? It fetches the AUX DPCD registers for the DPRX or an LTTPR PHY link status. that's the whole vibe check β¨
And the layout of the returned link_status? it matches the DPCD register layout of the DPRX PHY link status. no surprises, no cap π
It returns 0 if the information was read successfully, or a negative error code on failure. π so like, check your return value, bestie, negative means it did not slay.
π₯ SEE ALSO π₯
okay this list is LONG, but every single one of these deserves their moment, so here we go, no skipping, periodt π
First up, the kernel file itself: ./drivers/gpu/drm/display/drm_dp_helper.c π followed by:
dp helpers(9)drm_dp_phy_name(9)drm_dp_lttpr_wake_timeout_setup(9)dp helpers(9)drm_dp_dpcd_probe(9)drm_dp_dpcd_set_powered(9)drm_dp_dpcd_set_probe(9)drm_dp_dpcd_read(9)drm_dp_dpcd_write(9)drm_dp_dpcd_read_link_status(9)drm_dp_link_power_up(9)drm_dp_link_power_down(9)drm_dp_dpcd_write_payload(9)drm_dp_dpcd_clear_payload(9)drm_dp_dpcd_poll_act_handled(9)drm_dp_downstream_is_type(9)drm_dp_downstream_is_tmds(9)drm_dp_send_real_edid_checksum(9)drm_dp_read_dpcd_caps(9)drm_dp_read_downstream_info(9)drm_dp_downstream_max_dotclock(9)drm_dp_downstream_max_tmds_clock(9)drm_dp_downstream_min_tmds_clock(9)drm_dp_downstream_max_bpc(9)drm_dp_downstream_420_passthrough(9)drm_dp_downstream_444_to_420_conversion(9)drm_dp_downstream_rgb_to_ycbcr_conversion(9)drm_dp_downstream_mode(9)drm_dp_downstream_id(9)drm_dp_downstream_debug(9)drm_dp_subconnector_type(9)drm_dp_set_subconnector_property(9)drm_dp_read_sink_count_cap(9)drm_dp_read_sink_count(9)drm_dp_remote_aux_init(9)drm_dp_aux_init(9)drm_dp_aux_register(9)drm_dp_aux_unregister(9)drm_dp_psr_setup_time(9)drm_dp_start_crc(9)drm_dp_stop_crc(9)drm_dp_read_desc(9)drm_dp_dump_lttpr_desc(9)drm_dp_dsc_sink_bpp_incr(9)drm_dp_dsc_slice_count_to_mask(9)drm_dp_dsc_sink_slice_count_mask(9)drm_dp_dsc_sink_max_slice_count(9)drm_dp_dsc_sink_line_buf_depth(9)drm_dp_dsc_sink_supported_input_bpcs(9)drm_dp_dsc_sink_max_slice_throughput(9)drm_dp_dsc_branch_max_overall_throughput(9)drm_dp_dsc_branch_max_line_width(9)drm_dp_read_lttpr_common_caps(9)drm_dp_read_lttpr_phy_caps(9)drm_dp_lttpr_count(9)drm_dp_lttpr_max_link_rate(9)drm_dp_lttpr_set_transparent_mode(9)drm_dp_lttpr_init(9)drm_dp_lttpr_max_lane_count(9)drm_dp_lttpr_voltage_swing_level_3_supported(9)drm_dp_lttpr_pre_emphasis_level_3_supported(9)drm_dp_get_phy_test_pattern(9)drm_dp_set_phy_test_pattern(9)drm_dp_as_sdp_supported(9)drm_dp_vsc_sdp_supported(9)drm_dp_vsc_sdp_pack(9)drm_dp_get_pcon_max_frl_bw(9)drm_dp_pcon_frl_prepare(9)drm_dp_pcon_is_frl_ready(9)drm_dp_pcon_frl_configure_1(9)drm_dp_pcon_frl_configure_2(9)drm_dp_pcon_reset_frl_config(9)drm_dp_pcon_frl_enable(9)drm_dp_pcon_hdmi_link_active(9)drm_dp_pcon_hdmi_link_mode(9)drm_dp_pcon_hdmi_frl_link_error_count(9)drm_dp_pcon_pps_default(9)drm_dp_pcon_pps_override_buf(9)drm_edp_backlight_set_level(9)drm_edp_backlight_enable(9)drm_edp_backlight_disable(9)drm_edp_backlight_init(9)drm_panel_dp_aux_backlight(9)drm_dp_link_symbol_cycles(9)drm_dp_bw_overhead(9)drm_dp_bw_channel_coding_efficiency(9)drm_dp_max_dprx_data_rate(9)
if you made it to the end of that list, you're literally the main character ππ
lowkey important: the only thing this page promises is that 0 on success / negative on failure. don't go reading anything else into it, iykyk π
and that's the page!! it comes to you from ./drivers/gpu/drm/display, dated October 2026, and it's filed under drm_dp_dpcd_..._link_status(9) β mwah, go read some DPCD registers bestie, you got this πβ¨π«Ά
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms