section 9 · Kernel routines 🧠

87928 pages · page 331 of 440

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S (continued)

struct cros_ec_readmem(9)Struct used to read mapped memory.✨
struct cros_ec_rpmsg(9)information about a EC over rpmsg.✨
struct cros_ec_rpmsg_response(9)rpmsg message format from from EC.✨
struct cros_ec_rtc(9)Driver data for EC RTC✨
struct cros_ec_sensor_platform(9)ChromeOS EC sensor platform information.✨
struct cros_ec_sensors_core_state(9)state data for EC sensors IIO driver✨
struct cros_ec_sensors_ts_filter_state(9)Timestamp filetr state.✨
struct cros_ec_spi(9)information about a SPI-connected EC✨
struct cros_ec_uart(9)information about a uart-connected EC✨
struct cros_ec_xfer_work_params(9)params for our high priority workers✨
struct cros_feature_to_cells(9)CrOS feature id to mfd cells association.✨
struct cros_feature_to_name(9)CrOS feature id to name/short description.✨
struct crossbar_device(9)crossbar device description✨
struct crypto_acomp(9)user-instantiated objects which encapsulate algorithms and core processing logic✨
struct crypto_akcipher(9)user-instantiated objects which encapsulate algorithms and core processing logic✨
struct crypto_alg(9)definition of a cryptograpic cipher algorithm✨
struct crypto_keys(9)Crypto keys✨
struct crypto_kpp(9)user-instantiated object which encapsulate algorithms and core processing logic✨
struct crypto_kpp_spawn(9)KPP algorithm spawn✨
struct crypto_sig(9)user-instantiated objects which encapsulate algorithms and core processing logic✨
struct crystalcove_gpio(9)Crystal Cove GPIO controller✨
struct crystalcove_pwm(9)Crystal Cove PWM controller✨
struct cs4270_mode_ratios(9)clock ratio tables✨
struct cs_data(9)struct with info on a chipselect setting✨
struct cs_dsp(9)Configuration and state of a Cirrus Logic DSP✨
struct cs_dsp_alg_region(9)Describes a logical algorithm region in DSP address space✨
struct cs_dsp_chunk(9)Describes a buffer holding data formatted for the DSP✨
struct cs_dsp_client_ops(9)client callbacks✨
struct cs_dsp_coeff_ctl(9)Describes a coefficient control✨
struct cs_dsp_mock_alg_def(9)Info for creating a mock algorithm entry.✨
struct cs_dsp_mock_xm_header(9)XM header builder✨
struct cs_dsp_region(9)Describes a logical memory region in DSP address space✨
struct cs_dsp_test(9)base class for test utilities✨
struct cs_dsp_wseq(9)Describes a write sequence✨
struct cs_timeout_info(9)info of last CS timeout occurred.✨
struct csdev_access(9)Abstraction of a CoreSight device access.✨
struct csiphy_lanes_cfg(9)CSIPHY lanes configuration✨
struct csis_pix_format(9)CSIS pixel format description✨
struct csis_state(9)the driver's internal state data structure✨
struct css_driver(9)device driver for subchannels✨
struct ct_kill_notif(9)CT-kill entry notification This structure represent both versions of this notification.✨
struct ctcu_etr_config(9)✨
struct cti_config(9)configuration of the CTI device hardware✨
struct cti_device(9)description of CTI device properties.✨
struct cti_drvdata(9)specifics for the CTI device✨
struct ctl_table_header(9)maintains dynamic lists of struct ctl_table trees✨
struct ctx_hdr(9)Book keeping data about the crypto context✨
struct cv1800_mbox_chan_priv(9)cv1800 mailbox channel private data✨
struct cvmx_usb_iso_packet(9)descriptor for Isochronous packets✨
struct cvmx_usb_pipe(9)a pipe represents a virtual connection between Octeon and some USB device. It contains a list of pending request to the device.✨
struct cvmx_usb_port_status(9)the USB port status information✨
struct cvmx_usb_transaction(9)describes each pending USB transaction regardless of type. These are linked together to form a list of pending requests for a pipe.✨
struct cx25840_state(9)a device instance private data✨
struct cxd2820r_config(9)configuration for cxd2020r demod✨
struct cxd2820r_platform_data(9)Platform data for the cxd2820r driver✨
struct cxl_attach_region(9)coordinate mapping a region at memdev registration✨
struct cxl_command_info(9)Command information returned from a query.✨
struct cxl_decoder(9)Common CXL HDM Decoder Attributes✨
struct cxl_dev_state(9)The driver device state✨
struct cxl_dpa_partition(9)DPA partition descriptor✨
struct cxl_dpa_perf(9)DPA performance property entry✨
struct cxl_dport(9)CXL downstream port✨
struct cxl_endpoint_decoder(9)Endpoint / SPA to DPA decoder✨
struct cxl_endpoint_dvsec_info(9)Cached DVSEC info✨
struct cxl_ep(9)track an endpoint's interest in a port✨
struct cxl_event_state(9)Event log driver state✨
struct cxl_features_state(9)The Features state for the device✨
struct cxl_fw_state(9)Firmware upload / activation state✨
struct cxl_hdm(9)HDM Decoder registers and cached / decoded capabilities✨
struct cxl_mailbox(9)context for CXL mailbox operations✨
struct cxl_mbox_cmd(9)A command to be submitted to hardware.✨
struct cxl_mem_command(9)Driver representation of a memory device command✨
struct cxl_mem_query_commands(9)Query supported commands.✨
struct cxl_mem_repair_attrbs(9)CXL memory repair attributes✨
struct cxl_memdev(9)CXL bus object representing a Type-3 Memory Device✨
struct cxl_memdev_state(9)Generic Type-3 Memory Device Class driver data✨
struct cxl_poison_state(9)Driver poison state info✨
struct cxl_port(9)logical collection of upstream port devices and downstream port devices to construct a CXL memory decode hierarchy.✨
struct cxl_rd_ops(9)CXL root decoder callback operations✨
struct cxl_region(9)CXL region✨
struct cxl_region_label(9)CXL 2.0 Table 211✨
struct cxl_region_params(9)region settings✨
struct cxl_region_ref(9)track a region's interest in a port✨
struct cxl_register_map(9)DVSEC harvested register block mapping parameters✨
struct cxl_root(9)logical collection of root cxl_port items✨
struct cxl_root_decoder(9)Static platform CXL address decoder✨
struct cxl_security_state(9)Device security state✨
struct cxl_send_command(9)Send a command to a memory device.✨
struct cxl_switch_decoder(9)Switch specific CXL HDM Decoder✨
struct cy8c95x0_pinctrl(9)driver data✨
struct cyc_hist(9)(CPU) cycle histogram for a basic block✨
struct cyclecounter(9)hardware abstraction for a free running counter Provides completely state-free accessors to the underlying hardware. Depending on which hardware it reads, the cycle counter may wrap around quickly…✨
struct cycx_firmware(9)CYCX firmware file structure @signature - CFM file signature @version - file format version @checksum - info + image @reserved - reserved @descr - description string @info - firmware module info…✨
struct cycx_fw_info(9)firmware module information. @codeid - firmware ID @version - firmware version number @adapter - compatible adapter types @memsize - minimum memory size @reserved - reserved @startoffs - entry…✨
struct cygnus_pcie_phy(9)Cygnus PCIe PHY device✨
struct cygnus_pcie_phy_core(9)Cygnus PCIe PHY core control✨
struct d40_base(9)The big global struct, one for each probe'd instance.✨
struct d40_chan(9)Struct that describes a channel.✨
struct d40_def_lcsp(9)Default LCSP1 and LCSP3 settings✨
struct d40_desc(9)A descriptor is one DMA job.✨
struct d40_gen_dmac(9)generic values to represent u8500/u8540 DMA controller✨
struct d40_interrupt_lookup(9)lookup table for interrupt handler✨
struct d40_lcla_pool(9)LCLA pool settings and data.✨
struct d40_lli_pool(9)Structure for keeping LLIs in memory✨
struct d40_log_lli(9)logical lli configuration✨
struct d40_log_lli_bidir(9)For both src and dst✨
struct d40_log_lli_full(9)LCPA layout✨
struct d40_phy_lli(9)The basic configuration register for each physical channel.✨
struct d40_phy_lli_bidir(9)struct for a transfer.✨
struct d40_phy_res(9)struct for handling eventlines mapped to physical channels.✨
struct d40_reg_val(9)simple lookup struct✨
struct da8xx_rproc(9)da8xx remote processor instance state✨
struct da8xx_rproc_mem(9)internal memory structure✨
struct dal_allocation(9)Tracks mapped FB memory for SMU communication✨
struct damon_addr_range(9)Represents an address region of [@start, @end).✨
struct damon_attrs(9)Monitoring attributes for accuracy/overhead control.✨
struct damon_ctx(9)Represents a context for each monitoring. This is the main interface that allows users to set the attributes and get the results of the monitoring.✨
struct damon_filter(9)DAMON region filter for &struct damon_probe.✨
struct damon_intervals_goal(9)Monitoring intervals auto-tuning goal.✨
struct damon_operations(9)Monitoring operations for given use cases.✨
struct damon_probe(9)Data region attribute probe.✨
struct damon_region(9)Represents a monitoring target region.✨
struct damon_size_range(9)Represents size for filter to operate on [@min, @max].✨
struct damon_target(9)Represents a monitoring target.✨
struct damos(9)Represents a Data Access Monitoring-based Operation Scheme.✨
struct damos_access_pattern(9)Target access pattern of the given scheme.✨
struct damos_filter(9)DAMOS action target memory filter.✨
struct damos_migrate_dests(9)Migration destination nodes and their weights.✨
struct damos_quota(9)Controls the aggressiveness of the given scheme.✨
struct damos_quota_goal(9)DAMOS scheme quota auto-tuning goal.✨
struct damos_stat(9)Statistics on a given scheme.✨
struct damos_walk_control(9)Control damos_walk().✨
struct damos_watermarks(9)Controls when a given scheme should be activated.✨
struct data_chunk(9)Element of scatter-gather list that makes a frame.✨
struct data_loc_info(9)Data location information✨
struct data_queue(9)Data queue✨
struct datapath(9)datapath for flow-based packet switching✨
struct davinci_lpsc_clk(9)LPSC clock structure✨
struct davinci_pll_clk(9)Main PLL clock (aka PLLOUT)✨
struct davinci_spi_config(9)Per-chip-select configuration for SPI slave devices✨
struct davinci_spi_platform_data(9)Platform data for SPI master device on DaVinci✨
struct davinci_timer_cfg(9)davinci clocksource driver configuration struct✨
struct dax_device(9)anchor object for dax services✨
struct dax_mapping(9)device to display mapping range attributes✨
struct dax_region(9)mapping infrastructure for dax devices✨
struct db7430(9)state container for a panel controlled by the DB7430 controller✨
struct dbc_user_nonce(9)Nonce exchange structure (input/output).✨
struct dbc_user_param(9)Parameter exchange structure (input/output).✨
struct dbc_user_setuid(9)UID exchange structure (input).✨
struct dbx500_asic_id(9)fields of the ASIC ID✨
struct dbx500_regulator_info(9)dbx500 regulator information✨
struct dc_color_caps(9)color pipes capabilities for DPP and MPC hw blocks✨
struct dc_crtc(9)DC specific drm_crtc✨
struct dc_crtc_timing(9)Timing parameters used to configure DCN blocks✨
struct dc_cursor_position(9)Hardware cursor data.✨
struct dc_drm_device(9)DC specific drm_device✨
struct dc_edid_caps(9)Capabilities read from EDID.✨
struct dc_get_status_options(9)Input selector for dc_state_get_status.✨
struct dc_plane(9)DC specific drm_plane✨
struct dc_probe_latencies(9)min/max/avg memory latency in ns.✨
struct dc_probe_scope(9)Selects what a probe measures against.✨
struct dc_probe_state(9)DM-authored descriptor of a single probe.✨
struct dc_probe_status(9)results for a probe.✨
struct dc_probe_updates(9)Absolute set of probes DM wants active.✨
struct dc_state(9)The full description of a state requested by users✨
struct dc_state_status(9)Output-only status object from dc_state_get_status.✨
struct dc_validation_set(9)Root validation input grouping all streams for a commit✨
struct dc_validation_stream(9)Per-stream surface/stream association for validation✨
struct dcb_peer_app_info(9)APP feature information sent by the peer✨
struct dccp_hdr(9)generic part of DCCP packet header✨
struct dccp_hdr_ack_bits(9)acknowledgment bits common to most packets✨
struct dccp_hdr_ext(9)the low bits of a 48 bit seq packet✨
struct dccp_hdr_request(9)Connection initiation request header✨
struct dccp_hdr_reset(9)Unconditionally shut down a connection✨
struct dccp_hdr_response(9)Connection initiation response header✨
struct dcmipp_ent_device(9)core struct that represents a node in the topology✨
struct dcn60_bandwidth_clocks_update_action(9)captures what clock and p- state changes are needed for a bandwidth update, separating the action logic from block sequence construction and state mutation.✨
struct dcp_blob_fmt(9)DCP BLOB format.✨
struct dcw(9)Device-Command Word (DCW)✨
struct dcw_intrg_data(9)Interrogate DCW data✨
struct ddcb_queue(9)DDCB queue data✨
struct ddcb_requ(9)Kernel internal representation of the DDCB request✨
struct ddiv(9)Structure for dynamic switching divider✨
struct ddiv_clk(9)DDIV clock✨
struct ddr_device_info(9)All information about the DDR device except AC timing parameters✨
struct debug_obj(9)representation of an tracked object✨
struct debug_obj_descr(9)object type specific debug description structure✨
struct delayed_dev_rmhs_node(9)Delayed device removal node✨
struct delayed_evt_ack_node(9)Delayed event ack node✨
struct delayed_free(9)data structures used for delayed freeing✨
struct denali_chip(9)per-chip data of Denali NAND✨
struct denali_chip_sel(9)per-CS data of Denali NAND✨
struct denali_controller(9)Denali NAND controller data✨
struct desc_write_args(9)Arguments in order to write a descriptor.✨
struct dev_dax(9)instance data for a subdivision of a dax region, and data while the device is activated in the driver.✨
struct dev_dax_range(9)tuple represenging a range of memory used by dev_dax✨
struct dev_ext_attribute(9)Exported device attribute with extra context.✨
struct dev_info(9)Network device information data structure✨
struct dev_iommu(9)Collection of per-device IOMMU data✨
struct dev_links_info(9)Device data related to device links.✨