STRUCT DENALI_CHIP_SEL(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ NAME ✨

struct denali_chip_sel β€” per-CS data of Denali NAND

okay so real talk, this little struct is straight out of the Kernel API Manual (that's section 9 bestie, the kernel interfaces girlies) and it's literally the vibe-holder for one chip select on a Denali NAND controller. per-CS. periodt. πŸ¦‹


🌸 SYNOPSIS 🌸

struct denali_chip_sel {
    int bank;
    u32 hwhr2_and_we_2_re;
    u32 tcwaw_and_addr_2_data;
    u32 re_2_we;
    u32 acc_clks;
    u32 rdwr_en_lo_cnt;
    u32 rdwr_en_hi_cnt;
    u32 cs_setup_cnt;
    u32 re_2_re;
 };

no cap, that's the whole glow-up. nine fields, all doing their own little thing πŸ’…


πŸ’œ Members πŸ’œ

  • bank β€” the bank id of the controller that this CS is hooked up to 🫢
  • hwhr2_and_we_2_re β€” the value of timing register HWHR2_AND_WE_2_RE ✨
  • tcwaw_and_addr_2_data β€” the value of timing register TCWAW_AND_ADDR_2_DATA ✨
  • re_2_we β€” the value of timing register RE_2_WE ✨
  • acc_clks β€” the value of timing register ACC_CLKS ✨
  • rdwr_en_lo_cnt β€” the value of timing register RDWR_EN_LO_CNT ✨
  • rdwr_en_hi_cnt β€” the value of timing register RDWR_EN_HI_CNT ✨
  • cs_setup_cnt β€” the value of timing register CS_SETUP_CNT ✨
  • re_2_re β€” the value of timing register RE_2_RE ✨
like, yes, it's a lot of timing registers, but every single one is a real field and every single one mirrors a real register name, so don't come for me 😭 just copy them exactly, iykyk

πŸŽ€ SEE ALSO πŸŽ€

stroll on over to the kernel file ./drivers/mtd/nand/raw/denali.h β€” and also go say hi to struct denali_chip(9) and struct denali_controller(9) because they're literally family πŸ‘‘


that's the whole page bestie, sourced from ./drivers/mtd/nand/raw, dated October 2026, and yes it's struct denali_chip_sel(9) β€” mwah, bye πŸ§šπŸ’–

πŸ“¦ where this page comes from