STRUCT D40_DESC(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

🌸 NAME 🌸

okay bestie, meet struct d40_desc from the Kernel API Manual β€” a descriptor is literally one DMA job. πŸ’…


πŸŽ€ SYNOPSIS πŸŽ€

struct d40_desc {
    struct d40_phy_lli_bidir         lli_phy;
    struct d40_log_lli_bidir         lli_log;
    struct d40_lli_pool              lli_pool;
    int lli_len;
    int lli_current;
    int lcla_alloc;
    struct dma_async_tx_descriptor   txd;
    struct list_head                 node;
    bool is_in_client_list;
    bool cyclic;
 };

🫢 Members 🫢

  • lli_phy β€” LLI settings for the physical channel. Both src and dst= point into the lli_pool β€” to base when lli_len > 1, or to pre_alloc_lli when lli_len equals one. ✨
  • lli_log β€” same as above, but for logical channels. πŸ¦‹
  • lli_pool β€” the pool, with two entries pre-allocated. πŸŽ€
  • lli_len β€” number of llis of the current descriptor. πŸ”’
  • lli_current β€” number of transferred llis. 🚚
  • lcla_alloc β€” number of LCLA entries allocated. πŸ‘‘
  • txd β€” DMA engine struct. Among other things, it’s used for communication during a transfer. πŸ“‘
  • node β€” a list entry. πŸ”—
  • is_in_client_list β€” true if the client owns this descriptor. 🫢
  • cyclic β€” true if this is a cyclic job. πŸ”

πŸ’– Description πŸ’–

This descriptor is used for both logical and physical transfers. no cap. ✨


πŸ”— SEE ALSO πŸ”—

  • Kernel file ./drivers/dma/ste_dma40.c
  • struct stedma40_platform_data(9)
  • enum d40_command(9)
  • struct d40_interrupt_lookup(9)
  • struct d40_reg_val(9)
  • struct d40_lli_pool(9)
  • struct d40_lcla_pool(9)
  • struct d40_phy_res(9)
  • struct d40_chan(9)
  • struct d40_gen_dmac(9)
  • struct d40_base(9)

mwah πŸ’‹ this page’s source/version is ./drivers/dma, it’s dated October 2026, and it’s still struct d40_desc(9) β€” bye bestie! πŸ«ΆπŸŽ€

πŸ“¦ where this page comes from