STRUCT D40_BASE(9)
πΈ NAME πΈ
okay so welcome to the Kernel API Manual page for struct d40_base(9) β the big global struct, one for each probe'd instance. she's literally the main-character global struct of this driver, one per probe'd instance, no cap. π
β¨ SYNOPSIS β¨
struct d40_base {
spinlock_t interrupt_lock;
spinlock_t execmd_lock;
struct device *dev;
void __iomem *virtbase;
u8 rev:4;
struct clk *clk;
int irq;
int num_memcpy_chans;
int num_phy_chans;
int num_log_chans;
struct dma_device dma_both;
struct dma_device dma_slave;
struct dma_device dma_memcpy;
struct d40_chan *log_chans;
struct d40_chan **lookup_log_chans;
struct d40_chan **lookup_phy_chans;
struct stedma40_platform_data *plat_data;
struct regulator *lcpa_regulator;
struct d40_phy_res *phy_res;
struct d40_lcla_pool lcla_pool;
void *lcpa_base;
dma_addr_t phy_lcpa;
resource_size_t lcpa_size;
struct kmem_cache *desc_slab;
u32 reg_val_backup[BACKUP_REGS_SZ];
u32 reg_val_backup_v4[BACKUP_REGS_SZ_MAX];
u32 *reg_val_backup_chan;
u32 *regs_interrupt;
u16 gcc_pwr_off_mask;
struct d40_gen_dmac gen_dmac;
struct d40_chan phy_chans[];
};
π Members π
interrupt_lockβ the lock used to make sure one interrupt is handled at a time. one interrupt at a time, bestie, no interrupt pile-up. β¨execmd_lockβ lock for execute command usage, because several channels share the same physical register. shared register, shared lock, we love to see it. π«Άdevβ the device structure. iconic little pointer to the device, periodt. πvirtbaseβ the virtual base address of the DMA's register. the vibes are virtual and the address is base. πΈrevβ silicon revision detected. yes, she checked the silicon's revision, no cap. πclkβ pointer to the DMA clock structure. clock structure pointer, slay. π°οΈirqβ the IRQ number. just the IRQ number, bestie, keep it moving. β‘num_memcpy_chansβ the number of channels used for memcpy (mem-to-mem transfers). mem-to-mem transfers have their own channel count. πnum_phy_chansβ the number of physical channels. read from HW. this is the number of available channels for this driver, not counting"Secure mode"allocated physical channels. so real, so hardware, so read-from-HW. π₯num_log_chansβ the number of logical channels. calculated fromnum_phy_chans. math but make it channels. π§dma_bothβdma_devicechannels that can do both memcpy and slave transfers. both? she ate. πdma_slaveβdma_devicechannels that can only do slave transfers. slave transfers only, no multitasking. πdma_memcpyβdma_devicechannels that can only do memcpy transfers. memcpy transfers only, focused queen. πlog_chansβ room for all possible logical channels in system. room for every possible logical channel, bestie. πlookup_log_chansβ used to map interrupt number to logical channel. points tolog_chansentries. interrupt number to logical channel, iconic mapping behavior. πlookup_phy_chansβ used to map interrupt number to physical channel. points tophy_chansentries. interrupt number to physical channel, same energy, physical version. πplat_dataβ pointer to providedplatform_datawhich is the driver configuration. provided platform data, driver configuration, periodt. π«Άlcpa_regulatorβ pointer to hold the regulator for the esram bank for lcla. regulator for the esram bank for lcla, not me mixing up lcla and lcpa, iykyk. πphy_resβ vector containing all physical channels. all the physical channels, vectorized and ready. π¦lcla_poolβ lcla pool settings and data. pool settings and data, lowkey important. πlcpa_baseβ the virtual mapped address of LCPA. virtual mapped address, LCPA girlie. π«phy_lcpaβ the physical address of the LCPA. physical address of the LCPA, literally. πlcpa_sizeβ the size of the LCPA area. the LCPA area has a size and this is it. πdesc_slabβ cache for descriptors. descriptor cache, slay. π§Ίreg_val_backupβ here the values of some hardware registers are stored before the DMA is powered off. they are restored when the power is back on. power-off backup, power-on restore, we love a comeback. πreg_val_backup_v4β backup of registers that only exits ondma40v3 and later. yes, that's what the page says, bestie β v3 and later. πΎreg_val_backup_chanβ backup data for standard channel parameter registers. standard channel parameter registers get their backup data. πregs_interruptβ scratch space for registers during interrupt. interrupt-time scratch space, no cap. ποΈgcc_pwr_off_maskβ mask to maintain the channels that can be turned off. mask to maintain the channels that can be turned off, periodt. πgen_dmacβ the struct for generic registers values to representu8500/8540DMA controller. generic register values for theu8500/8540DMA controller, iconic. βοΈphy_chansβ room for all possible physical channels in system. room for every possible physical channel, bestie. π
π SEE ALSO π
- Kernel file
./drivers/dma/ste_dma40.c struct stedma40_platform_data(9)enum d40_command(9)struct d40_interrupt_lookup(9)struct d40_reg_val(9)struct d40_lli_pool(9)struct d40_desc(9)struct d40_lcla_pool(9)struct d40_phy_res(9)struct d40_chan(9)struct d40_gen_dmac(9)
mwah π β source ./drivers/dma, date October 2026, page struct d40_base(9). bye bestie! π«Ά
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms