dce8_line_buffer_adjust(9)
β¨ NAME β¨
dce8_line_buffer_adjust β Set up the line buffer
Okay so bestie, you're on the dce8_line_buffer_adjust(9) page from the Kernel API Manual, and it's literally all about setting up the line buffer. π
π SYNOPSIS π
Here's the exact signature, no cap:
u32 dce8_line_buffer_adjust (struct radeon_device *rdev , struct
radeon_crtc *radeon_crtc , struct drm_display_mode *mode );
π¦ ARGUMENTS π¦
rdevβ radeon_device pointer. That's the pointer, periodt.radeon_crtcβ the selected display controller.modeβ the current display mode on the selected display controller.
πΈ DESCRIPTION πΈ
So this function handles the line buffer allocation setup for the selected display controller (CIK). Then it returns the line buffer size in pixels. That's the whole tea, bestie. π
π SEE ALSO π
The kernel file is ./drivers/gpu/drm/radeon/cik.c, and here's the whole iconic crew of related pages:
cik_get_allowed_info_register(9)cik_get_xclk(9)cik_mm_rdoorbell(9)cik_mm_wdoorbell(9)cik_srbm_select(9)ci_mc_load_microcode(9)cik_init_microcode(9)cik_tiling_mode_table_init(9)cik_select_se_sh(9)cik_create_bitmask(9)cik_get_rb_disabled(9)cik_setup_rb(9)cik_gpu_init(9)cik_scratch_init(9)cik_ring_test(9)cik_hdp_flush_cp_ring_emit(9)cik_fence_gfx_ring_emit(9)cik_fence_compute_ring_emit(9)cik_semaphore_ring_emit(9)cik_copy_cpdma(9)cik_ring_ib_execute(9)cik_ib_test(9)cik_cp_gfx_enable(9)cik_cp_gfx_load_microcode(9)cik_cp_gfx_start(9)cik_cp_gfx_fini(9)cik_cp_gfx_resume(9)cik_cp_compute_enable(9)cik_cp_compute_load_microcode(9)cik_cp_compute_start(9)cik_cp_compute_fini(9)cik_cp_compute_resume(9)cik_gpu_check_soft_reset(9)cik_gpu_soft_reset(9)cik_asic_reset(9)cik_gfx_is_lockup(9)cik_mc_program(9)cik_mc_init(9)cik_pcie_gart_tlb_flush(9)cik_pcie_gart_enable(9)cik_pcie_gart_disable(9)cik_pcie_gart_fini(9)cik_ib_parse(9)cik_vm_init(9)cik_vm_fini(9)cik_vm_decode_fault(9)cik_rlc_stop(9)cik_rlc_start(9)cik_rlc_resume(9)cik_enable_interrupts(9)cik_disable_interrupts(9)cik_disable_interrupt_state(9)cik_irq_init(9)cik_irq_set(9)cik_irq_ack(9)cik_irq_disable(9)cik_irq_suspend(9)cik_irq_fini(9)cik_get_ih_wptr(9)cik_irq_process(9)cik_startup(9)cik_resume(9)cik_suspend(9)cik_init(9)cik_fini(9)cik_get_number_of_dram_channels(9)dce8_dram_bandwidth(9)dce8_dram_bandwidth_for_display(9)dce8_data_return_bandwidth(9)dce8_dmif_request_bandwidth(9)dce8_available_bandwidth(9)dce8_average_bandwidth(9)dce8_latency_watermark(9)dce8_average_bandwidth_vs_dram_bandwidth_for_display(9)dce8_average_bandwidth_vs_available_bandwidth(9)dce8_check_latency_hiding(9)dce8_program_watermarks(9)dce8_bandwidth_update(9)cik_get_gpu_clock_counter(9)
That's the whole page, bestie. Sending you a big kiss from ./drivers/gpu/drm/radeon, dated October 2026 β mwah πβ¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms