cik_gpu_check_soft_reset(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… cik_gpu_check_soft_reset(9)

okay so bestie, this one lives in the Kernel API Manual and it's genuinely a little detective story β€” let's get into it πŸ•΅οΈβ€β™€οΈβœ¨


🌸 NAME

cik_gpu_check_soft_reset β€” literally just checking which blocks are busy, no cap πŸ’…


✨ SYNOPSIS

u32 cik_gpu_check_soft_reset (struct radeon_device *rdev );

like, that's it. that's the whole vibe. one argument, returns a u32 πŸŽ€


🫢 ARGUMENTS

  • rdev β€” a radeon_device pointer. that's your gpu's whole little identity card, bestie πŸ’–

πŸ’œ DESCRIPTION

So here's the tea β˜• β€” this function checks which blocks are busy and hands you back the relevant reset mask, which is the mask that cik_gpu_soft_reset is gonna use. Basically it's the "okay who's still awake in here" pre-check before anybody gets reset 😭

Returns: a mask of the blocks to be reset. slay πŸ”₯


πŸ‘‘ SEE ALSO

the whole friend group, fr fr β€” no skipping, everyone's invited πŸŽ€

Kernel file ./drivers/gpu/drm/radeon/cik.c

cik_get_allowed_info_register(9), cik_get_xclk(9), cik_mm_rdoorbell(9), cik_mm_wdoorbell(9), cik_srbm_select(9), ci_mc_load_microcode(9), cik_init_microcode(9), cik_tiling_mode_table_init(9), cik_select_se_sh(9), cik_create_bitmask(9), cik_get_rb_disabled(9), cik_setup_rb(9), cik_gpu_init(9), cik_scratch_init(9), cik_ring_test(9), cik_hdp_flush_cp_ring_emit(9), cik_fence_gfx_ring_emit(9), cik_fence_compute_ring_emit(9), cik_semaphore_ring_emit(9), cik_copy_cpdma(9), cik_ring_ib_execute(9), cik_ib_test(9), cik_cp_gfx_enable(9), cik_cp_gfx_load_microcode(9), cik_cp_gfx_start(9), cik_cp_gfx_fini(9), cik_cp_gfx_resume(9), cik_cp_compute_enable(9), cik_cp_compute_load_microcode(9), cik_cp_compute_start(9), cik_cp_compute_fini(9), cik_cp_compute_resume(9), cik_gpu_soft_reset(9), cik_asic_reset(9), cik_gfx_is_lockup(9), cik_mc_program(9), cik_mc_init(9), cik_pcie_gart_tlb_flush(9), cik_pcie_gart_enable(9), cik_pcie_gart_disable(9), cik_pcie_gart_fini(9), cik_ib_parse(9), cik_vm_init(9), cik_vm_fini(9), cik_vm_decode_fault(9), cik_rlc_stop(9), cik_rlc_start(9), cik_rlc_resume(9), cik_enable_interrupts(9), cik_disable_interrupts(9), cik_disable_interrupt_state(9), cik_irq_init(9), cik_irq_set(9), cik_irq_ack(9), cik_irq_disable(9), cik_irq_suspend(9), cik_irq_fini(9), cik_get_ih_wptr(9), cik_irq_process(9), cik_startup(9), cik_resume(9), cik_suspend(9), cik_init(9), cik_fini(9), dce8_line_buffer_adjust(9), cik_get_number_of_dram_channels(9), dce8_dram_bandwidth(9), dce8_dram_bandwidth_for_display(9), dce8_data_return_bandwidth(9), dce8_dmif_request_bandwidth(9), dce8_available_bandwidth(9), dce8_average_bandwidth(9), dce8_latency_watermark(9), dce8_average_bandwidth_vs_dram_bandwidth_for_display(9), dce8_average_bandwidth_vs_available_bandwidth(9), dce8_check_latency_hiding(9), dce8_program_watermarks(9), dce8_bandwidth_update(9), cik_get_gpu_clock_counter(9)


okay that's the whole page, mwah πŸ’‹ this little love letter ships from ./drivers/gpu/drm/radeon and it's dated October 2026 β€” go forth and check those soft resets, bestie, you're so iconic for reading the docs πŸ¦‹πŸ‘‘

πŸ“¦ where this page comes from