cik_pcie_gart_enable(9)
π cik_pcie_gart_enable β like, the gart enable one, from the Kernel API Manual (section 9)
okay bestie, so this one's called cik_pcie_gart_enable(9) and honestly it's giving "quietly essential" β no cap, it's the little function that makes the GART actually, you know, gart. Let's get into it π
β¨ SYNOPSIS β¨
int cik_pcie_gart_enable (struct radeon_device *rdev );
that's it, that's the whole signature. one argument, one int back. iconic minimalism π
πΈ ARGUMENTS πΈ
rdevβ aradeon_devicepointer. that's the whole description, bestie, the manpage really said "you know what it is" π so yeah: pointer to the radeon device struct. that's your main character right there.
π¦ DESCRIPTION π¦
okay so here's the tea β β this function does a bunch of setup all at once:
- it sets up the TLBs
- it programs the page tables for VMID0
- it sets up the hw for VMIDs 1-15, which are allocated on demand (not upfront, they're β¨situationalβ¨)
- it sets up the global locations for the LDS, the GDS, and the GPUVM for FSA64 clients (CIK)
and the return value? it returns 0 for success, and errors for failure. so like, check your return value, bestie, don't just ignore it π
no cap, failure here means errors come back β this is not a "fire and forget" situation, it's giving "please actually read the return code" π«Ά
π SEE ALSO π
bestie, the cross-reference list here is long and it ATE. every single one of these is a real, separate manpage (section 9) β go read them, they're all in the kernel file ./drivers/gpu/drm/radeon/cik.c:
cik_get_allowed_info_register(9)cik_get_xclk(9)cik_mm_rdoorbell(9)cik_mm_wdoorbell(9)cik_srbm_select(9)ci_mc_load_microcode(9)cik_init_microcode(9)cik_tiling_mode_table_init(9)cik_select_se_sh(9)cik_create_bitmask(9)cik_get_rb_disabled(9)cik_setup_rb(9)cik_gpu_init(9)cik_scratch_init(9)cik_ring_test(9)cik_hdp_flush_cp_ring_emit(9)cik_fence_gfx_ring_emit(9)cik_fence_compute_ring_emit(9)cik_semaphore_ring_emit(9)cik_copy_cpdma(9)cik_ring_ib_execute(9)cik_ib_test(9)cik_cp_gfx_enable(9)cik_cp_gfx_load_microcode(9)cik_cp_gfx_start(9)cik_cp_gfx_fini(9)cik_cp_gfx_resume(9)cik_cp_compute_enable(9)cik_cp_compute_load_microcode(9)cik_cp_compute_start(9)cik_cp_compute_fini(9)cik_cp_compute_resume(9)cik_gpu_check_soft_reset(9)cik_gpu_soft_reset(9)cik_asic_reset(9)cik_gfx_is_lockup(9)cik_mc_program(9)cik_mc_init(9)cik_pcie_gart_tlb_flush(9)cik_pcie_gart_disable(9)cik_pcie_gart_fini(9)cik_ib_parse(9)cik_vm_init(9)cik_vm_fini(9)cik_vm_decode_fault(9)cik_rlc_stop(9)cik_rlc_start(9)cik_rlc_resume(9)cik_enable_interrupts(9)cik_disable_interrupts(9)cik_disable_interrupt_state(9)cik_irq_init(9)cik_irq_set(9)cik_irq_ack(9)cik_irq_disable(9)cik_irq_suspend(9)cik_irq_fini(9)cik_get_ih_wptr(9)cik_irq_process(9)cik_startup(9)cik_resume(9)cik_suspend(9)cik_init(9)cik_fini(9)dce8_line_buffer_adjust(9)cik_get_number_of_dram_channels(9)dce8_dram_bandwidth(9)dce8_dram_bandwidth_for_display(9)dce8_data_return_bandwidth(9)dce8_dmif_request_bandwidth(9)dce8_available_bandwidth(9)dce8_average_bandwidth(9)dce8_latency_watermark(9)dce8_average_bandwidth_vs_dram_bandwidth_for_display(9)dce8_average_bandwidth_vs_available_bandwidth(9)dce8_check_latency_hiding(9)dce8_program_watermarks(9)dce8_bandwidth_update(9)cik_get_gpu_clock_counter(9)
and the kernel file itself lives at ./drivers/gpu/drm/radeon/cik.c β that's the source of truth, go say hi π
and that's the whole page, bestie!! it ships out of ./drivers/gpu/drm/radeon, dated October 2026, and yeah β the footer really does say cik_pcie_gart_enable(9) again because the manpage tooling is nothing if not consistent ππ slay, go enable some garts π§β¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms