dce8_program_watermarks(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ dce8_program_watermarks β€” program display watermarks ✨

okay bestie, this one's a kernel API page (man section 9, the fancy kernel/dev one πŸ’…), and it's literally about telling the display hardware where to draw its watermark lines. let's get into it 🫢


🌸 SYNOPSIS 🌸

void dce8_program_watermarks (struct radeon_device *rdev , struct
       radeon_crtc *radeon_crtc , u32 lb_size , u32 num_heads );

no return value, she just does the thing and leaves ✨


πŸŽ€ ARGUMENTS πŸŽ€

  • rdev β€” a radeon_device pointer, aka your whole GPU situation πŸ–₯️
  • radeon_crtc β€” the selected display controller, the one getting the glow-up
  • lb_size β€” line buffer size, the number she's working with
  • num_heads β€” how many display controllers are in use rn πŸ‘€

πŸ’– DESCRIPTION πŸ’–

She calculates and programs the display watermarks for the selected display controller (CIK). that's the whole vibe. math first, then she writes it to the hardware. icon behavior, no cap πŸ’…


πŸ¦‹ SEE ALSO πŸ¦‹

Kernel file ./drivers/gpu/drm/radeon/cik.c, plus the whole friend group:

cik_get_allowed_info_register(9), cik_get_xclk(9), cik_mm_rdoorbell(9), cik_mm_wdoorbell(9), cik_srbm_select(9), ci_mc_load_microcode(9), cik_init_microcode(9), cik_tiling_mode_table_init(9), cik_select_se_sh(9), cik_create_bitmask(9), cik_get_rb_disabled(9), cik_setup_rb(9), cik_gpu_init(9), cik_scratch_init(9), cik_ring_test(9), cik_hdp_flush_cp_ring_emit(9), cik_fence_gfx_ring_emit(9), cik_fence_compute_ring_emit(9), cik_semaphore_ring_emit(9), cik_copy_cpdma(9), cik_ring_ib_execute(9), cik_ib_test(9), cik_cp_gfx_enable(9), cik_cp_gfx_load_microcode(9), cik_cp_gfx_start(9), cik_cp_gfx_fini(9), cik_cp_gfx_resume(9), cik_cp_compute_enable(9), cik_cp_compute_load_microcode(9), cik_cp_compute_start(9), cik_cp_compute_fini(9), cik_cp_compute_resume(9), cik_gpu_check_soft_reset(9), cik_gpu_soft_reset(9), cik_asic_reset(9), cik_gfx_is_lockup(9), cik_mc_program(9), cik_mc_init(9), cik_pcie_gart_tlb_flush(9), cik_pcie_gart_enable(9), cik_pcie_gart_disable(9), cik_pcie_gart_fini(9), cik_ib_parse(9), cik_vm_init(9), cik_vm_fini(9), cik_vm_decode_fault(9), cik_rlc_stop(9), cik_rlc_start(9), cik_rlc_resume(9), cik_enable_interrupts(9), cik_disable_interrupts(9), cik_disable_interrupt_state(9), cik_irq_init(9), cik_irq_set(9), cik_irq_ack(9), cik_irq_disable(9), cik_irq_suspend(9), cik_irq_fini(9), cik_get_ih_wptr(9), cik_irq_process(9), cik_startup(9), cik_resume(9), cik_suspend(9), cik_init(9), cik_fini(9), dce8_line_buffer_adjust(9), cik_get_number_of_dram_channels(9), dce8_dram_bandwidth(9), dce8_dram_bandwidth_for_display(9), dce8_data_return_bandwidth(9), dce8_dmif_request_bandwidth(9), dce8_available_bandwidth(9), dce8_average_bandwidth(9), dce8_latency_watermark(9), dce8_average_bandwidth_vs_dram_bandwidth_for_display(9), dce8_average_bandwidth_vs_available_bandwidth(9), dce8_check_latency_hiding(9), dce8_bandwidth_update(9), cik_get_gpu_clock_counter(9)

lowkey a whole squad, iykyk 🌈 (and yes, cik_bandwidth_update's cousin dce8_bandwidth_update is in there β€” they're besties)


this page lives in ./drivers/gpu/drm/radeon, and it's stamped October 2026 πŸŽ€ that's the version + date, bestie β€” and that's a wrap! πŸ’œ

πŸ“¦ where this page comes from