cik_gpu_init(9)
β¨ cik_gpu_init β setup the 3D engine β¨
okay so this is from the Kernel API Manual, section 9, and it's literally the little function that wakes up the 3D engine on your radeon card. bestie, it's giving "backstage pass" energy π
πΈ NAME πΈ
cik_gpu_init β setup the 3D engine
π¦ SYNOPSIS π¦
void cik_gpu_init (struct radeon_device *rdev );
no return value, no drama, it just goes in there and does the thing π
π ARGUMENTS π
rdevβ aradeon_devicepointer. that's your whole GPU's little passport, like the main character of the whole driver π«Ά
π DESCRIPTION π
so what it actually does: it configures the 3D engine β¨ and it configures the tiling configuration registers β¨ β all so that the 3D engine ends up usable. that's it, that's the whole vibe. no cap, it's a setup function and it slays at being one π₯
think of it as the moment before the glow-up: registers get told what's what, tiling gets its settings, and then the 3D engine can finally do its job π
π SEE ALSO π
- Kernel file
./drivers/gpu/drm/radeon/cik.cβ the source, the origin story π
and the whole friend group, fr fr:
cik_get_allowed_info_register(9)cik_get_xclk(9)cik_mm_rdoorbell(9)cik_mm_wdoorbell(9)cik_srbm_select(9)ci_mc_load_microcode(9)cik_init_microcode(9)cik_tiling_mode_table_init(9)cik_select_se_sh(9)cik_create_bitmask(9)cik_get_rb_disabled(9)cik_setup_rb(9)cik_scratch_init(9)cik_ring_test(9)cik_hdp_flush_cp_ring_emit(9)cik_fence_gfx_ring_emit(9)cik_fence_compute_ring_emit(9)cik_semaphore_ring_emit(9)cik_copy_cpdma(9)cik_ring_ib_execute(9)cik_ib_test(9)cik_cp_gfx_enable(9)cik_cp_gfx_load_microcode(9)cik_cp_gfx_start(9)cik_cp_gfx_fini(9)cik_cp_gfx_resume(9)cik_cp_compute_enable(9)cik_cp_compute_load_microcode(9)cik_cp_compute_start(9)cik_cp_compute_fini(9)cik_cp_compute_resume(9)cik_gpu_check_soft_reset(9)cik_gpu_soft_reset(9)cik_asic_reset(9)cik_gfx_is_lockup(9)cik_mc_program(9)cik_mc_init(9)cik_pcie_gart_tlb_flush(9)cik_pcie_gart_enable(9)cik_pcie_gart_disable(9)cik_pcie_gart_fini(9)cik_ib_parse(9)cik_vm_init(9)cik_vm_fini(9)cik_vm_decode_fault(9)cik_rlc_stop(9)cik_rlc_start(9)cik_rlc_resume(9)cik_enable_interrupts(9)cik_disable_interrupts(9)cik_disable_interrupt_state(9)cik_irq_init(9)cik_irq_set(9)cik_irq_ack(9)cik_irq_disable(9)cik_irq_suspend(9)cik_irq_fini(9)cik_get_ih_wptr(9)cik_irq_process(9)cik_startup(9)cik_resume(9)cik_suspend(9)cik_init(9)cik_fini(9)dce8_line_buffer_adjust(9)cik_get_number_of_dram_channels(9)dce8_dram_bandwidth(9)dce8_dram_bandwidth_for_display(9)dce8_data_return_bandwidth(9)dce8_dmif_request_bandwidth(9)dce8_available_bandwidth(9)dce8_average_bandwidth(9)dce8_latency_watermark(9)dce8_average_bandwidth_vs_dram_bandwidth_for_display(9)dce8_average_bandwidth_vs_available_bandwidth(9)dce8_check_latency_hiding(9)dce8_program_watermarks(9)dce8_bandwidth_update(9)cik_get_gpu_clock_counter(9)
and that's the whole page, bestie β go be iconic with your registers πβ¨
shoutout to the source ./drivers/gpu/drm/radeon, dated October 2026 β ily, mwah π«Άπ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms