cik_select_se_sh(9)
π cik_select_se_sh β Kernel API Manual β¨
okay so bestie, welcome to the cik_select_se_sh(9) page, straight out of the Kernel API Manual π. this one's a tiny little function but she's important, so grab your strawberry drink π and let's get into it.
πΈ NAME πΈ
cik_select_se_sh β she picks which SE and SH you're addressing, no cap π
β¨ SYNOPSIS β¨
void cik_select_se_sh (struct radeon_device *rdev , u32 se_num , u32 sh_num );
that's it. that's the whole signature. she's short and she knows it π
π«Ά ARGUMENTS π«Ά
rdevβ aradeon_devicepointer. literally the device you're talking to, your main character π₯οΈse_numβ the shader engine you wanna address. which SE, girl? pick one π«sh_numβ the sh block to address. the SH in question, bestie π§
π DESCRIPTION π
so what she does: she selects which SE, SH combinations to address β¨. certain registers are instanced per SE or SH β like, they exist once per engine/block, iykyk β and this is how you point at the right one instead of yelling into the void π
and here's the iconic part: 0xffffffff means broadcast to all SEs or SHs β for CIK. that's the "hey everyone listen up" option π₯
ngl, if you pass 0xffffffff expecting one single engine, you're gonna have a bad time β that's the broadcast value, fr fr.
π¦ SEE ALSO π¦
the kernel file lives right here, go read her π:
./drivers/gpu/drm/radeon/cik.c
and the whole friend group π:
cik_get_allowed_info_register(9)cik_get_xclk(9)cik_mm_rdoorbell(9)cik_mm_wdoorbell(9)cik_srbm_select(9)ci_mc_load_microcode(9)cik_init_microcode(9)cik_tiling_mode_table_init(9)cik_create_bitmask(9)cik_get_rb_disabled(9)cik_setup_rb(9)cik_gpu_init(9)cik_scratch_init(9)cik_ring_test(9)cik_hdp_flush_cp_ring_emit(9)cik_fence_gfx_ring_emit(9)cik_fence_compute_ring_emit(9)cik_semaphore_ring_emit(9)cik_copy_cpdma(9)cik_ring_ib_execute(9)cik_ib_test(9)cik_cp_gfx_enable(9)cik_cp_gfx_load_microcode(9)cik_cp_gfx_start(9)cik_cp_gfx_fini(9)cik_cp_gfx_resume(9)cik_cp_compute_enable(9)cik_cp_compute_load_microcode(9)cik_cp_compute_start(9)cik_cp_compute_fini(9)cik_cp_compute_resume(9)cik_gpu_check_soft_reset(9)cik_gpu_soft_reset(9)cik_asic_reset(9)cik_gfx_is_lockup(9)cik_mc_program(9)cik_mc_init(9)cik_pcie_gart_tlb_flush(9)cik_pcie_gart_enable(9)cik_pcie_gart_disable(9)cik_pcie_gart_fini(9)cik_ib_parse(9)cik_vm_init(9)cik_vm_fini(9)cik_vm_decode_fault(9)cik_rlc_stop(9)cik_rlc_start(9)cik_rlc_resume(9)cik_enable_interrupts(9)cik_disable_interrupts(9)cik_disable_interrupt_state(9)cik_irq_init(9)cik_irq_set(9)cik_irq_ack(9)cik_irq_disable(9)cik_irq_suspend(9)cik_irq_fini(9)cik_get_ih_wptr(9)cik_irq_process(9)cik_startup(9)cik_resume(9)cik_suspend(9)cik_init(9)cik_fini(9)dce8_line_buffer_adjust(9)cik_get_number_of_dram_channels(9)dce8_dram_bandwidth(9)dce8_dram_bandwidth_for_display(9)dce8_data_return_bandwidth(9)dce8_dmif_request_bandwidth(9)dce8_available_bandwidth(9)dce8_average_bandwidth(9)dce8_latency_watermark(9)dce8_average_bandwidth_vs_dram_bandwidth_for_display(9)dce8_average_bandwidth_vs_available_bandwidth(9)dce8_check_latency_hiding(9)dce8_program_watermarks(9)dce8_bandwidth_update(9)cik_get_gpu_clock_counter(9)
mwah π that's the whole page. she came from ./drivers/gpu/drm/radeon, dated October 2026 β go off, queen πβ¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms