dfll_set_default_params(9)

💖 NAME 💖

okay so bestie, this is dfll_set_default_params(9) from the Kernel API Manual, and it’s literally about one thing: program non-output related DFLL parameters. that’s the whole NAME-section vibe. ✨

🌸 SYNOPSIS 🌸

void dfll_set_default_params (struct tegra_dfll *td );

🎀 ARGUMENTS 🎀

• td — DFLL instance. 💅

🦋 DESCRIPTION 🦋

so during DFLL driver initialization — or when you’re resuming from context loss — this function programs the parameters for the closed loop integrator, DVCO tuning, voltage droop control and monitor control. that’s the tea. 🫶

👑 SEE ALSO 👑

the kernel file is ./drivers/clk/tegra/clk-dfll.c, and here’s the full squad of related pages:

• enum dfll_ctrl_mode(9)
• enum dfll_tune_range(9)
• struct dfll_rate_req(9)
• dfll_is_running(9)
• tegra_dfll_runtime_resume(9)
• tegra_dfll_runtime_suspend(9)
• dfll_tune_low(9)
• dfll_scale_dvco_rate(9)
• dfll_set_mode(9)
• dfll_i2c_set_output_enabled(9)
• dfll_pwm_set_output_enabled(9)
• dfll_set_force_output_value(9)
• dfll_set_force_output_enabled(9)
• dfll_force_output(9)
• dfll_load_i2c_lut(9)
• dfll_init_i2c_if(9)
• dfll_init_out_if(9)
• find_lut_index_for_rate(9)
• dfll_calculate_rate_request(9)
• dfll_set_frequency_request(9)
• dfll_request_rate(9)
• dfll_disable(9)
• dfll_enable(9)
• dfll_set_open_loop_config(9)
• dfll_lock(9)
• dfll_unlock(9)
• dfll_register_clk(9)
• dfll_unregister_clk(9)
• dfll_calc_monitored_rate(9)
• dfll_read_monitor_rate(9)
• dfll_init_clks(9)
• dfll_init(9)
• tegra_dfll_suspend(9)
• tegra_dfll_resume(9)
• dfll_build_i2c_lut(9)
• read_dt_param(9)
• dfll_fetch_i2c_params(9)
• dfll_fetch_common_params(9)
• tegra_dfll_register(9)
• tegra_dfll_unregister(9)

mwah 💋 this page’s source/version is ./drivers/clk/tegra, and the date on it is October 2026 — bye bestie, go slay those DFLL params! 🎀