dfll_disable(9)
π dfll_disable β kernel API manual, but make it make sense
okay so bestie, welcome to dfll_disable(9) β¨ this one's short and sweet, which honestly? we love that for us π«Ά it lives in the dfll_disable section of the kernel API manual, and it's literally just "turn the open-loop vibe off and go fully disabled" π
β¨ NAME β¨
dfll_disable β switch from open-loop mode to disabled mode π like, we're leaving the open-loop party and going home (home = DISABLED) π€
πΈ SYNOPSIS πΈ
int dfll_disable (struct tegra_dfll *td );
that's it. one arg. no cap. π
π¦ ARGUMENTS π¦
tdβ the DFLL instance π literally the thing you're disabling, bestie, keep up
π DESCRIPTION π
so here's the tea β: this function switches the DFLL from the OPEN_LOOP state over to the DISABLED state. that's the whole plot, honestly, main character energy π¬
it returns 0 upon success β¨ or -EPERM if the DFLL is not currently in open-loop mode π so like, if it's not where it's supposed to be, it's not doing the thing β vibe check failed, no notes π
fr fr: -EPERM is not a "permission" problem in the usual sense here, it's just the kernel being dramatic that the mode wasn't right π don't come for me, that's what the page says.
π SEE ALSO π
the whole squad π«Ά and yes, we're listing every single one, because we don't do half-finished here:
- the kernel file
./drivers/clk/tegra/clk-dfll.cπ enum dfll_ctrl_mode(9)enum dfll_tune_range(9)struct dfll_rate_req(9)dfll_is_running(9)tegra_dfll_runtime_resume(9)tegra_dfll_runtime_suspend(9)dfll_tune_low(9)dfll_scale_dvco_rate(9)dfll_set_mode(9)dfll_i2c_set_output_enabled(9)dfll_pwm_set_output_enabled(9)dfll_set_force_output_value(9)dfll_set_force_output_enabled(9)dfll_force_output(9)dfll_load_i2c_lut(9)dfll_init_i2c_if(9)dfll_init_out_if(9)find_lut_index_for_rate(9)dfll_calculate_rate_request(9)dfll_set_frequency_request(9)dfll_request_rate(9)dfll_enable(9)dfll_set_open_loop_config(9)dfll_lock(9)dfll_unlock(9)dfll_register_clk(9)dfll_unregister_clk(9)dfll_calc_monitored_rate(9)dfll_read_monitor_rate(9)dfll_set_default_params(9)dfll_init_clks(9)dfll_init(9)tegra_dfll_suspend(9)tegra_dfll_resume(9)dfll_build_i2c_lut(9)read_dt_param(9)dfll_fetch_i2c_params(9)dfll_fetch_common_params(9)tegra_dfll_register(9)tegra_dfll_unregister(9)
like, the whole friend group showed up πΈ iykyk π
okay that's the page!! π§ source lives over in ./drivers/clk/tegra, dated October 2026 β mwah, go disable some DFLLs responsibly, bestie π
π₯
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms