dfll_pwm_set_output_enabled(9)
π dfll_pwm_set_output_enabled (9) β Kernel API Manual π
okay so bestie, we're in the kernel API manual and today's main character is dfll_pwm_set_output_enabled. Yes that's a long name. Yes she earned it. She's the one who decides whether PWM voltage requests get to happen or not. Periodt. β¨
πΈ NAME πΈ
dfll_pwm_set_output_enabled β enable/disable PWM voltage requests
Like, that's literally the whole gig. On or off. Slay. π
β¨ SYNOPSIS β¨
int dfll_pwm_set_output_enabled (struct tegra_dfll *td , bool enable );
She takes two things and gives you back an int. Simple. Iconic. No cap. π«Ά
π ARGUMENTS π
tdβ your DFLL instance. The whole little world this function lives in. π¦enableβ aboolthat says whether we're enabling or disabling the PWM voltage requests. Like a vibe check but for voltage. β‘
π₯ DESCRIPTION π₯
So here's what she does: she sets the master enable control for PWM control value updates. Think of it as the big red button that governs whether the PWM control values get to update at all. π
If it's disabled? Then the PWM signal is not driven. Full stop. Not a single little pulse. π
She also does the housekeeping of configuring the PWM output pad to the appropriate state β so the pad matches whatever mode you just put it in. It's giving "I set the switch AND I made sure the pad is dressed appropriately for the occasion." π β¨
π SEE ALSO π
Kernel file ./drivers/clk/tegra/clk-dfll.c β plus literally the entire extended friend group:
enum dfll_ctrl_mode(9)enum dfll_tune_range(9)struct dfll_rate_req(9)dfll_is_running(9)tegra_dfll_runtime_resume(9)tegra_dfll_runtime_suspend(9)dfll_tune_low(9)dfll_scale_dvco_rate(9)dfll_set_mode(9)dfll_i2c_set_output_enabled(9)dfll_set_force_output_value(9)dfll_set_force_output_enabled(9)dfll_force_output(9)dfll_load_i2c_lut(9)dfll_init_i2c_if(9)dfll_init_out_if(9)find_lut_index_for_rate(9)dfll_calculate_rate_request(9)dfll_set_frequency_request(9)dfll_request_rate(9)dfll_disable(9)dfll_enable(9)dfll_set_open_loop_config(9)dfll_lock(9)dfll_unlock(9)dfll_register_clk(9)dfll_unregister_clk(9)dfll_calc_monitored_rate(9)dfll_read_monitor_rate(9)dfll_set_default_params(9)dfll_init_clks(9)dfll_init(9)tegra_dfll_suspend(9)tegra_dfll_resume(9)dfll_build_i2c_lut(9)read_dt_param(9)dfll_fetch_i2c_params(9)dfll_fetch_common_params(9)tegra_dfll_register(9)tegra_dfll_unregister(9)
That's 40 whole references. She does NOT do small circles. π
ngl bestie, this came out of./drivers/clk/tegraand the page is dated October 2026. The manual name isdfll_pwm_set_output_enabled(9)and the footer version matches the header, so likeβ¦ consistency queen. π Go read the source, ily, bye! ππ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms