dfll_calc_monitored_rate(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… dfll_calc_monitored_rate(9) πŸ’…

okay so this is a page straight out of the Kernel API Manual β€” bestie, it's dfll_calc_monitored_rate(9), and we're about to make it make sense. no cap, it's shorter than your attention span but it's lowkey important. πŸ¦‹


✨ NAME ✨

dfll_calc_monitored_rate β€” the little function that converts a DFLL_MONITOR_DATA_VAL rate into an actual real freq. it's giving translator energy, honestly. πŸ’…


🌸 SYNOPSIS 🌸

u64 dfll_calc_monitored_rate (u32 monitor_data , unsigned long ref_rate );

πŸŽ€ ARGUMENTS πŸŽ€

  • monitor_data β€” this is the value you read out of the DFLL_MONITOR_DATA_VAL bitfield. literally just the raw number, hand it over. πŸ“
  • ref_rate β€” the DFLL reference clock rate. that's the unsigned long one, yes ma'am. ⭐

🧚 DESCRIPTION 🧚

so what it does: it takes monitor_data β€” which is chilling in DFLL_MONITOR_DATA_VAL units β€” and converts it into cycles per second. that's it. that's the whole vibe.

and then? it returns the converted value. iconic. returns it as a u64, so it's not being subtle about it. 🫢


πŸ‘‘ SEE ALSO πŸ‘‘

bestie, the friend group is HUGE. all of these live in the kernel file ./drivers/clk/tegra/clk-dfll.c:

enum dfll_ctrl_mode(9), enum dfll_tune_range(9), struct dfll_rate_req(9), dfll_is_running(9), tegra_dfll_runtime_resume(9), tegra_dfll_runtime_suspend(9), dfll_tune_low(9), dfll_scale_dvco_rate(9), dfll_set_mode(9), dfll_i2c_set_output_enabled(9), dfll_pwm_set_output_enabled(9), dfll_set_force_output_value(9), dfll_set_force_output_enabled(9), dfll_force_output(9), dfll_load_i2c_lut(9), dfll_init_i2c_if(9), dfll_init_out_if(9), find_lut_index_for_rate(9), dfll_calculate_rate_request(9), dfll_set_frequency_request(9), dfll_request_rate(9), dfll_disable(9), dfll_enable(9), dfll_set_open_loop_config(9), dfll_lock(9), dfll_unlock(9), dfll_register_clk(9), dfll_unregister_clk(9), dfll_read_monitor_rate(9), dfll_set_default_params(9), dfll_init_clks(9), dfll_init(9), tegra_dfll_suspend(9), tegra_dfll_resume(9), dfll_build_i2c_lut(9), read_dt_param(9), dfll_fetch_i2c_params(9), dfll_fetch_common_params(9), tegra_dfll_register(9), tegra_dfll_unregister(9)

like I said. a whole friend group. mingle, babe. 🌈


ngl the whole thing lives under ./drivers/clk/tegra, and this little page is dated October 2026. screenshot it, cite it, live ur truth. πŸ’–βœ¨πŸŽ€
πŸ“¦ where this page comes from