dfll_scale_dvco_rate(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… dfll_scale_dvco_rate(9) ✨

okay so this is a Kernel API Manual page, and it's literally about turning a DVCO rate into a scaled rate. bestie, it's short, it's sweet, it's giving "small function, big responsibilities" energy πŸŽ€


🌸 SYNOPSIS 🌸

unsigned long dfll_scale_dvco_rate (int scale_bits , unsigned long
       dvco_rate );

like, yes, that's the whole signature. she's not complicated πŸ’…


πŸ¦‹ ARGUMENTS πŸ¦‹

  • scale_bits β€” the clock scaler value, aka the bits chillin' in the DFLL_FREQ_REQ_SCALE field. that's her whole personality 🫢
  • dvco_rate β€” the DVCO rate itself. the raw material. the moment before the glow-up ✨

πŸ’– DESCRIPTION πŸ’–

so what does it actually do? it applies the same scaling formula that the DFLL hardware uses to scale the DVCO rate. that's it. that's the whole thing. no cap πŸ’€

it's giving "software matching hardware, frame for frame" β€” you're not inventing a new math, you're just doing the exact same math the silicon does, so the numbers agree. iconic behavior honestly πŸ‘‘


⭐ SEE ALSO ⭐

the whole fam, and yes we're listing every single one because nobody gets left out πŸ’œ

Kernel file ./drivers/clk/tegra/clk-dfll.c


ngl if you're reading all 40 of those, you're a real one. drink some water πŸ“

and that's the page!! this lives over in ./drivers/clk/tegra, dated October 2026, and it's page dfll_scale_dvco_rate(9) β€” mwah, go forth and scale those rates bestie πŸ’…πŸŒˆβœ¨

πŸ“¦ where this page comes from