dfll_read_monitor_rate(9)
π dfll_read_monitor_rate(9) β Kernel API Manual, bestie edition β¨
okay so this is a page from the Kernel API Manual and it's all about dfll_read_monitor_rate, and honestly? it's a little baddie. let's get into it π«Ά
πΈ NAME πΈ
dfll_read_monitor_rate β return the DFLL's output rate from internal monitor
like... it reads the rate. from the monitor. the internal one. the name is not lying to you π
β SYNOPSIS β
u64 dfll_read_monitor_rate (struct tegra_dfll *td );
(yes the space before the ) is staying, it's part of the fit, don't @ me π
)
π ARGUMENTS π
tdβ DFLL instance. that's the one and only thing you hand it. your dfll. your guy. π¦
π₯ DESCRIPTION π₯
so here's the tea β β if the DFLL is enabled, this function returns the last rate reported by the DFLL's internal monitoring hardware. iconic behaviour, no notes.
the way that it works in both open-loop and closed-loop mode?? versatile queen π. and it takes the output scaler setting into account, so the number you get actually reflects the scaling, not just the raw vibe.
this function assumes that the monitor was programmed to monitor frequency before the sample period started β like, that's a precondition bestie, it's not checking, it's trusting you π
and then the important bit: if the driver believes that the DFLL is currently uninitialized or disabled, it will return 0. why? because otherwise the DFLL monitor data register will return the last measured rate from when the DFLL was active β which would be some stale, expired, last-season data and we're simply not doing that π. so 0 it is. periodt.
π SEE ALSO π
okay this list is LONG, hydrate before reading, but every single one is here, fr fr π
Kernel file ./drivers/clk/tegra/clk-dfll.c
enum dfll_ctrl_mode(9)enum dfll_tune_range(9)struct dfll_rate_req(9)dfll_is_running(9)tegra_dfll_runtime_resume(9)tegra_dfll_runtime_suspend(9)dfll_tune_low(9)dfll_scale_dvco_rate(9)dfll_set_mode(9)dfll_i2c_set_output_enabled(9)dfll_pwm_set_output_enabled(9)dfll_set_force_output_value(9)dfll_set_force_output_enabled(9)dfll_force_output(9)dfll_load_i2c_lut(9)dfll_init_i2c_if(9)dfll_init_out_if(9)find_lut_index_for_rate(9)dfll_calculate_rate_request(9)dfll_set_frequency_request(9)dfll_request_rate(9)dfll_disable(9)dfll_enable(9)dfll_set_open_loop_config(9)dfll_lock(9)dfll_unlock(9)dfll_register_clk(9)dfll_unregister_clk(9)dfll_calc_monitored_rate(9)dfll_set_default_params(9)dfll_init_clks(9)dfll_init(9)tegra_dfll_suspend(9)tegra_dfll_resume(9)dfll_build_i2c_lut(9)read_dt_param(9)dfll_fetch_i2c_params(9)dfll_fetch_common_params(9)tegra_dfll_register(9)tegra_dfll_unregister(9)
and that's the whole page, bestie π§π it lives over in ./drivers/clk/tegra, it's dated October 2026, and it's filed under dfll_read_monitor_rate(9). go read some kernel source, it's giving main character energy βπ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms