section 9 · Kernel routines 🧠
87928 pages · page 250 of 440
O (continued)
- off_cpu_dump(9)dump off-cpu samples to ring buffer✨
- offline_and_remove_memory_ranges(9)offline and remove multiple memory ranges✨
- offload_enqueue(9)add an offload packet to an SGE offload receive queue✨
- offset(9)Adds an offset to an input, and subtracts it from the feedback value.✨
- offset_dir_llseek(9)Advance the read position of a directory descriptor✨
- offset_readdir(9)Emit entries starting at offset @ctx->pos✨
- offset_to_ptr(9)convert a relative memory offset to an absolute pointer✨
- offsetofend(9)Report the offset of a struct field within the struct✨
- ofld_poll(9)NAPI handler for offload packets in interrupt mode✨
- ofld_xmit(9)send a packet through an offload queue✨
- ofld_xmit_direct(9)copy a WR into offload queue✨
- ofldtxq_stop(9)stop an offload Tx queue that has become full✨
- ofw_bus_get_status(9)check status of the device tree node✨
- ofw_bus_get_status(9freebsd)check status of the device tree node✨
- ofw_bus_is_compatible(9)check device tree nodes for compatibility with drivers✨
- ofw_bus_is_compatible(9freebsd)check device tree nodes for compatibility with drivers✨
- ofw_bus_is_compatible_strict(9)check device tree nodes for compatibility with drivers✨
- ofw_bus_is_compatible_strict(9freebsd)check device tree nodes for compatibility with drivers✨
- ofw_bus_node_is_compatible(9)check device tree nodes for compatibility with drivers✨
- ofw_bus_node_is_compatible(9freebsd)check device tree nodes for compatibility with drivers✨
- ofw_bus_node_status_okay(9)check status of the device tree node✨
- ofw_bus_node_status_okay(9freebsd)check status of the device tree node✨
- ofw_bus_search_compatible(9)check device tree nodes for compatibility with drivers✨
- ofw_bus_search_compatible(9freebsd)check device tree nodes for compatibility with drivers✨
- ofw_bus_status_okay(9)check status of the device tree node✨
- ofw_bus_status_okay(9freebsd)check status of the device tree node✨
- ofw_graph(9)Helpers for the graph bindings✨
- ofw_graph_get_device_by_port_ep(9)Helpers for the graph bindings✨
- ofw_graph_get_endpoint_by_idx(9)Helpers for the graph bindings✨
- ofw_graph_get_port_by_idx(9)Helpers for the graph bindings✨
- ofw_graph_get_remove_endpoint(9)Helpers for the graph bindings✨
- ofw_graph_get_remove_parent(9)Helpers for the graph bindings✨
- ofw_graph_port_get_num_endpoints(9)Helpers for the graph bindings✨
- ohci_hcd_omap_probe(9)initialize OMAP-based HCDs✨
- ohci_hcd_omap_remove(9)shutdown processing for OMAP-based HCDs✨
- ohci_hcd_pxa27x_probe(9)initialize pxa27x-based HCDs✨
- ohci_hcd_pxa27x_remove(9)shutdown processing for pxa27x-based HCDs✨
- ohci_hcd_sa1111_probe(9)initialize SA-1111-based HCDs✨
- ohci_hcd_sa1111_remove(9)shutdown processing for SA-1111-based HCDs✨
- ohmic(9)LinuxCNC HAL component that uses a Mesa THCAD for ohmic sensing✨
- oldpiix_init_one(9)Register PIIX ATA PCI device with kernel services✨
- oldpiix_pre_reset(9)probe begin✨
- oldpiix_qc_issue(9)command issue✨
- oldpiix_set_dmamode(9)Initialize host controller PATA DMA timings✨
- oldpiix_set_piomode(9)Initialize host controller PATA PIO timings✨
- omac1_aes_128(9)One-Key CBC MAC (OMAC1) hash with AES-128 (aka AES-CMAC)✨
- omac1_aes_128_vector(9)One-Key CBC MAC (OMAC1) hash with AES-128✨
- omap1_get_reset_sources(9)return the source of the SoC's last reset✨
- omap2430_clk_i2chs_find_idlest(9)return CM_IDLEST info for 2430 I2CHS✨
- omap2_clk_allow_idle(9)enable autoidle on an OMAP clock✨
- omap2_clk_deny_idle(9)disable autoidle on an OMAP clock✨
- omap2_clk_dflt_find_companion(9)find companion clock to @clk✨
- omap2_clk_dflt_find_idlest(9)find CM_IDLEST reg va, bit shift for @clk✨
- omap2_clk_disable_autoidle_all(9)disable autoidle on all OMAP clocks that support it✨
- omap2_clk_enable_autoidle_all(9)enable autoidle on all OMAP clocks that support it✨
- omap2_clk_enable_init_clocks(9)prepare & enable a list of clocks✨
- omap2_clk_for_each(9)call function for each registered clk_hw_omap✨
- omap2_clk_is_hw_omap(9)check if the provided clk_hw is OMAP clock✨
- omap2_clk_legacy_provider_init(9)initialize a legacy clock provider✨
- omap2_clk_provider_init(9)init master clock provider✨
- omap2_clk_setup_ll_ops(9)setup clock driver low-level ops✨
- omap2_clkops_disable_clkdm(9)decrement usecount on clkdm of @hw✨
- omap2_clkops_enable_clkdm(9)increment usecount on clkdm of @hw✨
- omap2_cm_base_init(9)initialize iomappings for the CM drivers✨
- omap2_control_base_init(9)initialize iomappings for the control driver✨
- omap2_dflt_clk_disable(9)disable a clock in the hardware✨
- omap2_dflt_clk_enable(9)enable a clock in the hardware✨
- omap2_dflt_clk_is_enabled(9)is clock enabled in the hardware?✨
- omap2_dpll_determine_rate(9)round a target rate for an OMAP DPLL✨
- omap2_get_dpll_rate(9)returns the current DPLL CLKOUT rate✨
- omap2_init_clk_clkdm(9)look up a clockdomain name, store pointer in clk✨
- omap2_prm_assert_hardreset(9)assert the HW reset line of a submodule✨
- omap2_prm_base_init(9)initialize iomappings for the PRM driver✨
- omap2_prm_deassert_hardreset(9)deassert a submodule hardreset line and wait✨
- omap2_prm_is_hardreset_asserted(9)read the HW reset line state of submodules contained in the hwmod module✨
- omap2_sdrc_init(9)initialize SMS, SDRC devices on boot @sdrc_cs[01]: pointers to a null-terminated list of struct omap_sdrc_params Support for 2 chip selects timings✨
- omap2_set_globals_prcm_mpu(9)set the MPU PRCM base address (for early use)✨
- omap2_set_gpio_debounce(9)low level gpio debounce time✨
- omap2_sms_restore_context(9)Restore SMS registers✨
- omap2_sms_save_context(9)Save SMS registers✨
- omap2_table_mpu_recalc(9)just return the MPU speed✨
- omap2_wd_timer_reset(9)reset and disable the WDTIMER IP block✨
- omap2xxx_clk_get_core_rate(9)return the CORE_CLK rate✨
- omap2xxx_clkt_dpllcore_init(9)clk init function for dpll_ck✨
- omap2xxx_clkt_vps_check_bootloader_rates(9)determine which of the rate table sets matches the current CORE DPLL hardware rate✨
- omap2xxx_clkt_vps_init(9)initialize virt_prcm_set clock✨
- omap2xxx_clkt_vps_late_init(9)store a copy of the sys_ck rate✨
- omap2xxx_cm_split_idlest_reg(9)split CM_IDLEST reg addr into its components✨
- omap2xxx_cm_wait_module_ready(9)wait for a module to leave idle or standby✨
- omap2xxx_common_look_up_clks_for_reset(9)look up clocks needed for restart✨
- omap2xxx_prm_clear_mod_irqs(9)clear wakeup status bits for a module✨
- omap2xxx_prm_dpll_reset(9)use DPLL reset to reboot the OMAP SoC✨
- omap2xxx_prm_read_reset_sources(9)return the last SoC reset source✨
- omap2xxx_pwrst_to_common_pwrst(9)convert OMAP2xxx pwrst to common pwrst✨
- omap2xxx_restart(9)Set DPLL to bypass mode for reboot to work✨
- omap3430_pre_es3_1_reconfigure_io_chain(9)restart wake-up daisy chain✨
- omap3430es2_clk_dss_usbhost_find_idlest(9)CM_IDLEST info for DSS, USBHOST✨
- omap3430es2_clk_hsotgusb_find_idlest(9)return CM_IDLEST info for HSOTGUSB✨
- omap3430es2_clk_ssi_find_idlest(9)return CM_IDLEST info for SSI✨
- omap36xx_gate_clk_enable_with_hsdiv_restore(9)enable clocks suffering from HSDivider PWRDN problem Implements Errata ID: i556.✨
- omap3_clk_lock_dpll5(9)locks DPLL5✨
- omap3_clkoutx2_recalc(9)recalculate DPLL X2 output virtual clock rate✨
- omap3_core_dpll_restore_context(9)restore the m and n values of the divider✨
- omap3_core_dpll_save_context(9)Save the m and n values of the divider✨
- omap3_ctrl_init(9)does static initializations for control module✨
- omap3_ctrl_save_padconf(9)save padconf registers to scratchpad RAM✨
- omap3_ctrl_set_iva_bootmode_idle(9)sets the IVA2 bootmode to idle✨
- omap3_ctrl_setup_d2d_padconf(9)setup stacked modem pads for idle✨
- omap3_ctrl_write_boot_mode(9)set scratchpad boot mode for the next boot✨
- omap3_dpll4_set_rate(9)set rate for omap3 per-dpll✨
- omap3_dpll4_set_rate_and_parent(9)set rate and parent for omap3 per-dpll✨
- omap3_dpll5_set_rate(9)set rate for omap3 dpll5✨
- omap3_dpll_allow_idle(9)enable DPLL autoidle bits✨
- omap3_dpll_autoidle_read(9)read a DPLL's autoidle bits✨
- omap3_dpll_deny_idle(9)prevent DPLL from automatically idling✨
- omap3_dpll_recalc(9)recalculate DPLL rate✨
- omap3_enter_idle(9)Programs OMAP3 to enter the specified state✨
- omap3_enter_idle_bm(9)Checks for any bus activity✨
- omap3_idle_init(9)Init routine for OMAP3 idle✨
- omap3_noncore_dpll_determine_rate(9)determine rate for a DPLL✨
- omap3_noncore_dpll_disable(9)instruct a DPLL to enter low-power stop✨
- omap3_noncore_dpll_enable(9)instruct a DPLL to enter bypass or lock mode✨
- omap3_noncore_dpll_program(9)set non-core DPLL M,N values directly✨
- omap3_noncore_dpll_restore_context(9)restore the m and n values of the divider✨
- omap3_noncore_dpll_save_context(9)Save the m and n values of the divider✨
- omap3_noncore_dpll_set_parent(9)set parent for a DPLL clock✨
- omap3_noncore_dpll_set_rate(9)set rate for a DPLL clock✨
- omap3_noncore_dpll_set_rate_and_parent(9)set rate and parent for a DPLL clock✨
- omap3_noncore_dpll_ssc_program(9)set spread-spectrum clocking registers✨
- omap3_prm_init_pm(9)initialize PM related registers for PRM✨
- omap3_prm_reconfigure_io_chain(9)clear latches and reconfigure I/O chain✨
- omap3_prm_reset_modem(9)toggle reset signal for modem✨
- omap3_set_i2c_timings(9)sets i2c sleep timings for a channel✨
- omap3_set_off_timings(9)sets off-mode timings for a channel✨
- omap3xxx_cm_split_idlest_reg(9)split CM_IDLEST reg addr into its components✨
- omap3xxx_cm_wait_module_ready(9)wait for a module to leave idle or standby✨
- omap3xxx_hwmod_is_hs_ip_block_usable(9)is a security IP block accessible?✨
- omap3xxx_prm_clear_global_cold_reset(9)checks the global cold reset status and clears it if asserted✨
- omap3xxx_prm_clear_mod_irqs(9)clear wake-up events from PRCM interrupt✨
- omap3xxx_prm_dpll3_reset(9)use DPLL3 reset to reboot the OMAP SoC✨
- omap3xxx_prm_enable_io_wakeup(9)enable wakeup events from I/O wakeup latches✨
- omap3xxx_prm_iva_idle(9)ensure IVA is in idle so it can be put into retention✨
- omap3xxx_prm_ocp_barrier(9)force buffered MPU writes to the PRM to complete✨
- omap3xxx_prm_read_pending_irqs(9)read pending PRM MPU IRQs into @events✨
- omap3xxx_prm_read_reset_sources(9)return the last SoC reset source✨
- omap3xxx_prm_restore_irqen(9)set PRM_IRQENABLE_MPU register from args✨
- omap3xxx_prm_save_and_clear_irqen(9)save/clear PRM_IRQENABLE_MPU reg✨
- omap3xxx_restart(9)trigger a software restart of the SoC✨
- omap4430_phy_power_down(9)disable MUSB PHY during early init✨
- omap44xx_prm_clear_context_loss_flags_old(9)clear context loss flags✨
- omap44xx_prm_enable_io_wakeup(9)enable wakeup events from I/O wakeup latches✨
- omap44xx_prm_ocp_barrier(9)force buffered MPU writes to the PRM to complete✨
- omap44xx_prm_read_pending_irqs(9)read pending PRM MPU IRQs into @events✨
- omap44xx_prm_read_reset_sources(9)return the last SoC reset source✨
- omap44xx_prm_reconfigure_io_chain(9)clear latches and reconfigure I/O chain✨
- omap44xx_prm_restore_irqen(9)set PRM_IRQENABLE_MPU* registers from args✨
- omap44xx_prm_save_and_clear_irqen(9)save/clear PRM_IRQENABLE_MPU* regs✨
- omap44xx_prm_was_any_context_lost_old(9)was module hardware context lost?✨
- omap44xx_restart(9)trigger a software restart of the SoC✨
- omap4_calc_volt_ramp(9)calculates voltage ramping delays on omap4✨
- omap4_clkdm_restore_context(9)Restore the clockdomain modulemode context✨
- omap4_clkdm_save_context(9)Save the clockdomain modulemode context✨
- omap4_cminst_clkdm_disable_hwsup(9)put a clockdomain in swsup-idle mode✨
- omap4_cminst_clkdm_enable_hwsup(9)put a clockdomain in hwsup-idle mode✨
- omap4_cminst_clkdm_force_wakeup(9)try to take a clockdomain out of idle✨
- omap4_cminst_is_clkdm_in_hwsup(9)is a clockdomain in hwsup idle mode?✨
- omap4_cminst_module_disable(9)Disable the module inside CLKCTRL✨
- omap4_cminst_module_enable(9)Enable the modulemode inside CLKCTRL✨
- omap4_cminst_wait_module_idle(9)wait for a module to be in 'disabled' state✨
- omap4_cminst_wait_module_ready(9)wait for a module to be in 'func' state✨
- omap4_dpll_lpmode_recalc(9)compute DPLL low-power setting✨
- omap4_dpll_regm4xen_determine_rate(9)determine rate for a DPLL✨
- omap4_dpll_regm4xen_recalc(9)compute DPLL rate, considering REGM4XEN bit✨
- omap4_enter_lowpower(9)OMAP4 MPUSS Low Power Entry Function The purpose of this function is to manage low power programming of OMAP4 MPUSS subsystem✨
- omap4_hotplug_cpu(9)OMAP4 CPU hotplug entry✨
- omap4_idle_init(9)Init routine for OMAP4+ idle✨
- omap4_pm_init(9)Init routine for OMAP4+ devices✨
- omap4_pm_init_early(9)Does early initialization necessary for OMAP4+ devices✨
- omap4_prminst_assert_hardreset(9)assert the HW reset line of a submodule✨
- omap4_prminst_deassert_hardreset(9)deassert a submodule hardreset line and wait✨
- omap4_prminst_is_hardreset_asserted(9)read the HW reset line state of submodules contained in the hwmod module✨
- omap4_pwrdm_read_prev_logic_pwrst(9)read the previous logic powerstate✨
- omap4_pwrdm_read_prev_mem_pwrst(9)reads the previous memory powerstate✨
- omap4_pwrdm_restore_context(9)Restores the powerdomain state✨
- omap4_pwrdm_save_context(9)Saves the powerdomain state✨
- omap4_set_timings(9)set voltage ramp timings for a channel✨
- omap4_usec_to_val_scrm(9)convert microsecond value to SCRM module bitfield✨
- omap4_vc_i2c_timing_init(9)sets up board I2C timing parameters✨
- omap4plus_init_static_deps(9)Initialize a static dependency map✨
- omap_calculate_ecc(9)Generate non-inverted ECC bytes.✨
- omap_calculate_ecc_bch_multi(9)Generate ECC for multiple sectors✨
- omap_calculate_ecc_bch_sw(9)ECC generator for sector for SW based correction✨
- omap_clear_gpio_debounce(9)clear debounce settings for a gpio✨
- omap_cm_base_init(9)Populates the cm partitions✨
- omap_cm_init(9)low level init for the CM drivers✨
- omap_cm_module_disable(9)disable a module✨
- omap_cm_module_enable(9)enable a module✨
- omap_cm_wait_module_idle(9)wait for a module to enter idle or standby✨
- omap_cm_wait_module_ready(9)wait for a module to leave idle or standby✨
- omap_common_suspend_init(9)Set common suspend routines for OMAP SoCs✨
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getting it ready, bestie…