section 9 · Kernel routines 🧠

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A (continued)

amdgpu_device_evict_resources(9)evict device resources✨
amdgpu_device_fill_reset_magic(9)writes reset magic to gart pointer✨
amdgpu_device_fini_hw(9)tear down the driver✨
amdgpu_device_get_gang(9)return a reference to the current gang✨
amdgpu_device_get_pcie_info(9)fence pcie info about the PCIE slot✨
amdgpu_device_get_rev_id(9)query device rev_id✨
amdgpu_device_gpu_bandwidth(9)find the bandwidth of the GPU✨
amdgpu_device_gpu_recover(9)reset the asic and recover scheduler✨
amdgpu_device_halt(9)bring hardware to some kind of halt state✨
amdgpu_device_has_dc_support(9)check if dc is supported✨
amdgpu_device_has_job_running(9)check if there is any unfinished job✨
amdgpu_device_indirect_rreg(9)read an indirect register✨
amdgpu_device_indirect_rreg64(9)read a 64bits indirect register✨
amdgpu_device_indirect_wreg(9)write an indirect register address✨
amdgpu_device_indirect_wreg64(9)write a 64bits indirect register address✨
amdgpu_device_init(9)initialize the driver✨
amdgpu_device_ip_block_add(9)✨
amdgpu_device_ip_block_version_cmp(9)✨
amdgpu_device_ip_early_init(9)run early init for hardware IPs✨
amdgpu_device_ip_fini(9)run fini for hardware IPs✨
amdgpu_device_ip_get_clockgating_state(9)get the CG state✨
amdgpu_device_ip_get_ip_block(9)get a hw IP pointer✨
amdgpu_device_ip_init(9)run init for hardware IPs✨
amdgpu_device_ip_is_valid(9)is the hardware IP valid✨
amdgpu_device_ip_late_init(9)run late init for hardware IPs✨
amdgpu_device_ip_resume(9)run resume for hardware IPs✨
amdgpu_device_ip_resume_phase1(9)run resume for hardware IPs✨
amdgpu_device_ip_resume_phase2(9)run resume for hardware IPs✨
amdgpu_device_ip_resume_phase3(9)run resume for hardware IPs✨
amdgpu_device_ip_set_clockgating_state(9)set the CG state✨
amdgpu_device_ip_set_powergating_state(9)set the PG state✨
amdgpu_device_ip_soft_reset(9)Perform a graceful soft reset on an IP block.✨
amdgpu_device_ip_suspend(9)run suspend for hardware IPs✨
amdgpu_device_ip_suspend_phase1(9)run suspend for hardware IPs (phase 1)✨
amdgpu_device_ip_suspend_phase2(9)run suspend for hardware IPs (phase 2)✨
amdgpu_device_ip_wait_for_idle(9)wait for idle✨
amdgpu_device_is_peer_accessible(9)Check peer access through PCIe BAR✨
amdgpu_device_mem_scratch_fini(9)Free the VRAM scratch page✨
amdgpu_device_mem_scratch_init(9)allocate the VRAM scratch page✨
amdgpu_device_mm_access(9)access vram by MM_INDEX/MM_DATA✨
amdgpu_device_need_post(9)check if the hw need post or not✨
amdgpu_device_parse_gpu_info_fw(9)parse gpu info firmware✨
amdgpu_device_partner_bandwidth(9)find the bandwidth of appropriate partner✨
amdgpu_device_pci_config_reset(9)reset the GPU✨
amdgpu_device_pci_reset(9)reset the GPU using generic PCI means✨
amdgpu_device_pm_notifier(9)Notification block for Suspend/Hibernate events✨
amdgpu_device_prepare(9)prepare for device suspend✨
amdgpu_device_program_register_sequence(9)program an array of registers.✨
amdgpu_device_reset_sriov(9)reset ASIC for SR-IOV vf✨
amdgpu_device_resize_fb_bar(9)try to resize FB BAR✨
amdgpu_device_resume(9)initiate device resume✨
amdgpu_device_rreg(9)read a memory mapped IO or indirect register✨
amdgpu_device_set_cg_state(9)set clockgating for amdgpu device✨
amdgpu_device_should_recover_gpu(9)check if we should try GPU recovery✨
amdgpu_device_should_use_aspm(9)check if the device should program ASPM✨
amdgpu_device_smu_fini_early(9)smu hw_fini wrapper✨
amdgpu_device_supports_baco(9)Does the device support BACO✨
amdgpu_device_supports_boco(9)Is the device a dGPU with ACPI power resources✨
amdgpu_device_supports_px(9)Is the device a dGPU with ATPX power control✨
amdgpu_device_supports_smart_shift(9)Is the device dGPU with smart shift support✨
amdgpu_device_suspend(9)initiate device suspend✨
amdgpu_device_switch_gang(9)switch to a new gang✨
amdgpu_device_vga_set_decode(9)enable/disable vga decode✨
amdgpu_device_vram_access(9)read/write a buffer in vram✨
amdgpu_device_wreg(9)write to a memory mapped IO or indirect register✨
amdgpu_device_xcc_rreg(9)read a memory mapped IO or indirect register with specific XCC✨
amdgpu_device_xcc_wreg(9)write to a memory mapped IO or indirect register with specific XCC✨
amdgpu_disable_vblank_kms(9)disable vblank interrupt✨
amdgpu_display_hotplug_work_func(9)work handler for display hotplug event✨
amdgpu_dm_atomic_check(9)Atomic check implementation for AMDgpu DM.✨
amdgpu_dm_atomic_commit_tail(9)AMDgpu DM's commit tail implementation.✨
amdgpu_dm_check_crtc_color_mgmt(9)Check if DRM color props are programmable by DC.✨
amdgpu_dm_connector_detect(9)Detect whether a DRM connector is connected to a display✨
amdgpu_dm_connector_poll(9)Poll a connector to see if it's connected to a display✨
amdgpu_dm_crtc_complete_writeback(9)finish a pending writeback job✨
amdgpu_dm_crtc_get_cursor_mode(9)Determine the required cursor mode on crtc✨
amdgpu_dm_crtc_handle_crc_irq(9)Report to DRM the CRC on given CRTC.✨
amdgpu_dm_crtc_set_static_screen_optimze(9)Toggle static screen optimizations.✨
amdgpu_dm_dump_links_and_sinks(9)Debug dump of all DC links and their sinks✨
amdgpu_dm_hdmi_hpd_debounce_work(9)✨
amdgpu_dm_hpd_fini(9)hpd tear down callback.✨
amdgpu_dm_hpd_init(9)hpd setup callback.✨
amdgpu_dm_init_color_mod(9)Initialize the color module.✨
amdgpu_dm_irq_ack(9)acknowledge a DC interrupt source.✨
amdgpu_dm_irq_fini(9)deallocate internal structures of 'amdgpu_dm_irq'.✨
amdgpu_dm_irq_handler(9)Generic DM IRQ handler✨
amdgpu_dm_irq_init(9)Initialize internal structures of 'amdgpu_dm_irq'.✨
amdgpu_dm_irq_register_interrupt(9)register irq handler for Display block.✨
amdgpu_dm_irq_resume_early(9)enable HPDRX ASIC interrupts during resume. amdgpu_dm_irq_resume - enable ASIC interrupt during resume.✨
amdgpu_dm_irq_set(9)enable or disable a DC interrupt source.✨
amdgpu_dm_irq_suspend(9)disable ASIC interrupt during suspend.✨
amdgpu_dm_irq_unregister_interrupt(9)unregister handler which was registered by amdgpu_dm_irq_register_interrupt().✨
amdgpu_dm_ism_disable(9)Quiesce ISM workers✨
amdgpu_dm_ism_enable(9)enable the ISM✨
amdgpu_dm_ism_force_full_power(9)Force every CRTC's ISM FSM to FULL_POWER✨
amdgpu_dm_mod_power_setup_streams(9)setup mod_power stream state post modeset✨
amdgpu_dm_mod_power_update_streams(9)update mod_power stream state on modeset✨
amdgpu_dm_plane_add_gfx6_modifiers(9)Expose modifiers for GFX6-8✨
amdgpu_dm_plane_calc_gfx6_mod(9)Calculate a DRM format modifier for GFX6-8✨
amdgpu_dm_plane_calc_gfx7_tile_split(9)Calculate tile split on GFX7-8✨
amdgpu_dm_plane_get_gfx6_tile_idx(9)Get tile mode index on GFX6-8✨
amdgpu_dm_plane_get_gfx7_macro_tile_idx(9)Get macro tile mode index on GFX7-8✨
amdgpu_dm_plane_gfx6_format_mod_supported(9)Check if a modifier is supported on GFX6-8✨
amdgpu_dm_psr_get_dc_debug_mask(9)Get DC debug mask for KUnit tests.✨
amdgpu_dm_psr_get_dc_feature_mask(9)Get DC feature mask for KUnit tests.✨
amdgpu_dm_psr_set_dc_debug_mask(9)Set DC debug mask for KUnit tests.✨
amdgpu_dm_psr_set_dc_feature_mask(9)Set DC feature mask for KUnit tests.✨
amdgpu_dm_update_crtc_color_mgmt(9)Maps DRM color management to DC stream.✨
amdgpu_dm_update_freesync_caps(9)Update Freesync capabilities✨
amdgpu_dm_update_plane_color_mgmt(9)Maps DRM color management to DC plane.✨
amdgpu_dm_verify_lut3d_size(9)verifies if 3D LUT is supported and if user shaper and 3D LUTs match the hw supported size✨
amdgpu_dm_verify_lut_sizes(9)verifies if DRM luts match the hw supported sizes✨
amdgpu_dma_buf_attach(9)&dma_buf_ops.attach implementation✨
amdgpu_dma_buf_begin_cpu_access(9)&dma_buf_ops.begin_cpu_access implementation✨
amdgpu_dma_buf_create_obj(9)create BO for DMA-buf import✨
amdgpu_dma_buf_detach(9)&dma_buf_ops.detach implementation✨
amdgpu_dma_buf_map(9)&dma_buf_ops.map_dma_buf implementation✨
amdgpu_dma_buf_move_notify(9)&attach.invalidate_mappings implementation✨
amdgpu_dma_buf_pin(9)&dma_buf_ops.pin implementation✨
amdgpu_dma_buf_unmap(9)&dma_buf_ops.unmap_dma_buf implementation✨
amdgpu_dma_buf_unpin(9)&dma_buf_ops.unpin implementation✨
amdgpu_dmabuf_is_xgmi_accessible(9)Check if xgmi available for P2P transfer✨
amdgpu_doorbell_create_kernel_doorbells(9)Create kernel doorbells for graphics✨
amdgpu_doorbell_fini(9)Tear down doorbell driver information.✨
amdgpu_doorbell_get_kfd_info(9)Report doorbell configuration required to setup amdkfd✨
amdgpu_doorbell_index_on_bar(9)Find doorbell's absolute offset in BAR✨
amdgpu_doorbell_init(9)Init doorbell driver information.✨
amdgpu_dpm_get_temp_metrics(9)Retrieve metrics for a specific compute partition✨
amdgpu_dpm_get_xcp_metrics(9)Retrieve metrics for a specific compute partition✨
amdgpu_dpm_is_temp_metrics_supported(9)Return if specific temperature metrics support is available✨
amdgpu_dpm_reset_sdma_is_supported(9)Check if SDMA reset is supported✨
amdgpu_driver_load_kms(9)Main load function for KMS.✨
amdgpu_driver_open_kms(9)drm callback for open✨
amdgpu_driver_postclose_kms(9)drm callback for post close✨
amdgpu_driver_unload_kms(9)Main unload function for KMS.✨
amdgpu_eeprom_xfer(9)- Read/write from/to an I2C EEPROM device✨
amdgpu_enable_vblank_kms(9)enable vblank interrupt✨
amdgpu_evict_flags(9)Compute placement flags✨
amdgpu_fence_count_emitted(9)get the count of emitted fences✨
amdgpu_fence_driver_force_completion(9)force signal latest fence of ring✨
amdgpu_fence_driver_hw_fini(9)tear down the fence driver for all possible rings.✨
amdgpu_fence_driver_hw_init(9)enable the fence driver for all possible rings.✨
amdgpu_fence_driver_init_ring(9)init the fence driver for the requested ring.✨
amdgpu_fence_driver_set_error(9)set error code on fences✨
amdgpu_fence_driver_start_ring(9)make the fence driver ready for use on the requested ring.✨
amdgpu_fence_driver_sw_init(9)init the fence driver for all possible rings.✨
amdgpu_fence_emit(9)emit a fence on the requested ring✨
amdgpu_fence_emit_polling(9)emit a fence on the requeste ring✨
amdgpu_fence_enable_signaling(9)enable signalling on fence✨
amdgpu_fence_fallback(9)fallback for hardware interrupts✨
amdgpu_fence_free(9)free up the fence memory✨
amdgpu_fence_last_unsignaled_time_us(9)the time fence emitted until now✨
amdgpu_fence_need_ring_interrupt_restore(9)helper function to check whether fence driver interrupts need to be restored.✨
amdgpu_fence_process(9)check for fence activity✨
amdgpu_fence_read(9)read a fence value✨
amdgpu_fence_release(9)callback that fence can be freed✨
amdgpu_fence_schedule_fallback(9)schedule fallback check✨
amdgpu_fence_update_start_timestamp(9)update the timestamp of the fence✨
amdgpu_fence_wait_empty(9)wait for all fences to signal✨
amdgpu_fence_wait_polling(9)busy wait for givn sequence number✨
amdgpu_fence_write(9)write a fence value✨
amdgpu_gart_bind(9)bind pages into the gart page table✨
amdgpu_gart_dummy_page_fini(9)free dummy page used by the driver✨
amdgpu_gart_dummy_page_init(9)init dummy page used by the driver✨
amdgpu_gart_init(9)init the driver info for managing the gart✨
amdgpu_gart_invalidate_tlb(9)invalidate gart TLB✨
amdgpu_gart_map(9)map dma_addresses into GART entries✨
amdgpu_gart_map_gfx9_mqd(9)map mqd and ctrl_stack dma_addresses into GART entries✨
amdgpu_gart_map_vram_range(9)map VRAM pages into the GART page table✨
amdgpu_gart_table_ram_alloc(9)allocate system ram for gart page table✨
amdgpu_gart_table_ram_free(9)free gart page table system ram✨
amdgpu_gart_table_vram_alloc(9)allocate vram for gart page table✨
amdgpu_gart_table_vram_free(9)free gart page table vram✨
amdgpu_gart_unbind(9)unbind pages from the gart page table✨
amdgpu_gem_list_handles_ioctl(9)get information about a process' buffer objects✨
amdgpu_gem_prime_export(9)&drm_driver.gem_prime_export implementation✨
amdgpu_gem_prime_import(9)&drm_driver.gem_prime_import implementation✨
amdgpu_gem_timeout(9)calculate jiffies timeout from absolute value✨
amdgpu_gem_va_update_vm(9)update the bo_va in its VM✨
amdgpu_get_vblank_counter_kms(9)get frame count✨
amdgpu_gfx_create_bitmask(9)create a bitmask✨
amdgpu_gfx_csb_data_parser(9)Parser CS data✨
amdgpu_gfx_csb_preamble_end(9)Set CSB preamble end✨
amdgpu_gfx_csb_preamble_start(9)Set CSB preamble start✨
amdgpu_gfx_enforce_isolation_handler(9)work handler for enforcing shader isolation✨
amdgpu_gfx_enforce_isolation_ring_begin_use(9)Begin use of a ring with enforced isolation✨
amdgpu_gfx_enforce_isolation_ring_end_use(9)End use of a ring with enforced isolation✨
amdgpu_gfx_enforce_isolation_wait_for_kfd(9)Manage KFD wait period for process isolation✨
amdgpu_gfx_get_enforce_isolation(9)Query AMDGPU GFX Enforce Isolation Settings✨
amdgpu_gfx_handle_priv_fault(9)Handle privileged instruction fault✨
amdgpu_gfx_kfd_sch_ctrl(9)Control the KFD scheduler from the KGD (Graphics Driver)✨
amdgpu_gfx_parse_disable_cu(9)Parse the disable_cu module parameter✨
amdgpu_gfx_rlc_enter_safe_mode(9)Set RLC into safe mode✨
amdgpu_gfx_rlc_exit_safe_mode(9)Set RLC out of safe mode✨
amdgpu_gfx_rlc_fini(9)Free BO which used for RLC✨
amdgpu_gfx_rlc_init_cpt(9)Init cp table✨
amdgpu_gfx_rlc_init_csb(9)Init clear state block✨
amdgpu_gfx_rlc_init_sr(9)Init save restore block✨
amdgpu_gfx_rlc_setup_cp_table(9)setup cp the buffer of cp table✨
amdgpu_gfx_set_enforce_isolation(9)Control AMDGPU GFX Enforce Isolation✨