amdgpu_gart_map_vram_range(9)
π amdgpu_gart_map_vram_range(9) β like, the Kernel API Manual edition π
okay bestie, welcome to the glow-up of amdgpu_gart_map_vram_range(9). this is the Kernel API Manual page for the function that maps VRAM pages into the GART page table, and we're gonna get into it. no cap, it's shorter than your fave's attention span, so let's go β¨
πΈ NAME πΈ
amdgpu_gart_map_vram_range β map VRAM pages into the GART page table
like, the whole vibe: VRAM pages get mapped into the GART page table. that's it, that's the tweet π¦
β¨ SYNOPSIS β¨
void amdgpu_gart_map_vram_range (struct amdgpu_device *adev , uint64_t
pa , uint64_t start_page , uint64_t num_pages , uint64_t flags , void
*dst );
it's giving "void function, six arguments, zero notes" π copy it exactly, don't be cute with it.
π«Ά ARGUMENTS π«Ά
adevβ amdgpu_device pointer. literally just the device pointer, bestie πpaβ physical address of the first page to be mapped. like, page one, the origin story β¨start_pageβ first page to map in the GART aperture. where it all begins in the GART world πnum_pagesβ number of pages to be mapped. the whole count, no skipped pages πflagsβ page table entry flags. the lil settings for the PTE, iconic πdstβ valid CPU address of GART table, cannot be null. like, fr fr, it cannot be null. do not test it π
π DESCRIPTION π
Binds a BO that is allocated in VRAM to the GART page table (all ASICs).
so basically: you've got this BO chilling in VRAM, and this function binds it to the GART page table. and yes, it works on all ASICs β universal queen behavior πβ¨
Useful when a kernel BO is located in VRAM but needs to be accessed from the GART address space.
that's the moment. kernel BO in VRAM, needs that GART address space access, and this is the function for the job π₯
π¦ SEE ALSO π¦
the friend group, in the order they appear in the group chat:
Kernel file ./drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
amdgpu_gart_dummy_page_init(9)amdgpu_gart_dummy_page_fini(9)amdgpu_gart_table_ram_alloc(9)amdgpu_gart_table_ram_free(9)amdgpu_gart_table_vram_alloc(9)amdgpu_gart_table_vram_free(9)amdgpu_gart_unbind(9)amdgpu_gart_map(9)amdgpu_gart_map_gfx9_mqd(9)amdgpu_gart_bind(9)amdgpu_gart_invalidate_tlb(9)amdgpu_gart_init(9)
β οΈ small vibe check: dst is a valid CPU address of GART table and it cannot be null. that's the one hard rule on this whole page, so don't fumble it π
and that's the page, bestie! this lil masterpiece lives at ./drivers/gpu/drm/amd/amdgpu, dated October 2026, and it's literally titled amdgpu_gart_map_vram_range(9) π mwah, go map some pages π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms