amdgpu_device_xcc_wreg(9)
π amdgpu_device_xcc_wreg β like, the kernel API manual, bestie
okay so picture this: it's a kernel API manual page, the star of the show is amdgpu_device_xcc_wreg(9), and she's here to write to a memory mapped IO or indirect register β but with a specific XCC, which is the whole lil twist π
β¨ NAME β¨
amdgpu_device_xcc_wreg β write to a memory mapped IO or indirect register with specific XCC π¦
πΈ SYNOPSIS πΈ
void amdgpu_device_xcc_wreg (struct amdgpu_device *adev , uint32_t reg ,
uint32_t v , uint32_t acc_flags , uint32_t xcc_id );
no cap, that's the whole signature π
π«Ά ARGUMENTS π«Ά
adevβ theamdgpu_devicepointer, aka the main character herself πregβ the register offset, and bestie it has to be dword aligned βvβ the 32 bit value you're writing into that register, slay πacc_flagsβ access flags, and these ones require special behavior, so, yk, pay attention πxcc_idβ the xcc accelerated compute core id, iykyk π
π DESCRIPTION π
Writes the value specified to the offset specified. periodt. β¨
Like, literally: you hand her a value, you hand her an offset, she writes the one to the other. that's the vibe check and she passes it every time ππ₯
π§ SEE ALSO π§
the kernel file:
./drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c
and her whole friend group, fr fr:
amdgpu_device_rreg(9)amdgpu_mm_rreg8(9)amdgpu_device_xcc_rreg(9)amdgpu_mm_wreg8(9)amdgpu_device_wreg(9)amdgpu_mm_wreg_mmio_rlc(9)amdgpu_device_indirect_rreg(9)amdgpu_device_indirect_rreg64(9)amdgpu_device_indirect_wreg(9)amdgpu_device_indirect_wreg64(9)
ok that's the whole page!! go write some registers, but like, correctly π
and that's a wrap bestie π this one lives in ./drivers/gpu/drm/amd/amdgpu, dated October 2026, and you can find her filed under amdgpu_device_xcc_wreg(9) β mwah, bye!! ππΈ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms