amdgpu_device_xcc_wreg(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… amdgpu_device_xcc_wreg β€” like, the kernel API manual, bestie

okay so picture this: it's a kernel API manual page, the star of the show is amdgpu_device_xcc_wreg(9), and she's here to write to a memory mapped IO or indirect register β€” but with a specific XCC, which is the whole lil twist πŸŽ€


✨ NAME ✨

amdgpu_device_xcc_wreg β€” write to a memory mapped IO or indirect register with specific XCC πŸ¦‹


🌸 SYNOPSIS 🌸

void amdgpu_device_xcc_wreg (struct amdgpu_device *adev , uint32_t reg ,
uint32_t v , uint32_t acc_flags , uint32_t xcc_id );

no cap, that's the whole signature πŸ’–


🫢 ARGUMENTS 🫢

  • adev β€” the amdgpu_device pointer, aka the main character herself πŸ‘‘
  • reg β€” the register offset, and bestie it has to be dword aligned ⭐
  • v β€” the 32 bit value you're writing into that register, slay πŸ’…
  • acc_flags β€” access flags, and these ones require special behavior, so, yk, pay attention πŸ™ˆ
  • xcc_id β€” the xcc accelerated compute core id, iykyk 🌈

πŸ’œ DESCRIPTION πŸ’œ

Writes the value specified to the offset specified. periodt. ✨

Like, literally: you hand her a value, you hand her an offset, she writes the one to the other. that's the vibe check and she passes it every time πŸ’€πŸ”₯


🧚 SEE ALSO 🧚

the kernel file:

./drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c

and her whole friend group, fr fr:


ok that's the whole page!! go write some registers, but like, correctly πŸ’–

and that's a wrap bestie πŸŽ€ this one lives in ./drivers/gpu/drm/amd/amdgpu, dated October 2026, and you can find her filed under amdgpu_device_xcc_wreg(9) β€” mwah, bye!! πŸ’œπŸŒΈ

πŸ“¦ where this page comes from