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D (continued)

dm_test_cacp_caps_old_ip_unsupported(9)Test CACP unsupported on old DCE✨
dm_test_cacp_caps_unsupported_ip(9)Test CACP disabled on old DCE IP✨
dm_test_cap_clock_levels_engine_caps(9)Test engine clock level capping✨
dm_test_cap_clock_levels_engine_first_exceeds(9)Test floor of one level✨
dm_test_cap_clock_levels_memory_caps(9)Test memory clock level capping✨
dm_test_cap_clock_levels_other_type(9)Test non-engine/memory types ignored✨
dm_test_cap_clock_levels_within_limit(9)Test no capping when within limit✨
dm_test_check_crtc_color_mgmt_degamma(9)Atomic degamma is mapped to the plane✨
dm_test_check_crtc_color_mgmt_legacy_regamma(9)Legacy LUT uses sRGB regamma✨
dm_test_check_crtc_color_mgmt_no_luts(9)No CRTC LUTs check succeeds✨
dm_test_color_depth_from_info_bpc10(9)Test Color depth from info bpc10✨
dm_test_color_depth_from_info_bpc8(9)Test Color depth from info bpc8✨
dm_test_color_depth_from_info_requested_bpc_caps(9)Test Color depth from info requested bpc caps✨
dm_test_color_depth_from_info_requested_odd_bpc(9)Test Color depth from info requested odd bpc✨
dm_test_color_depth_from_info_unsupported_bpc(9)Test Color depth from info unsupported bpc✨
dm_test_color_depth_from_info_y420_10bpc(9)Test Color depth from info y420 10bpc✨
dm_test_color_depth_from_info_y420_12bpc(9)Test Color depth from info y420 12bpc✨
dm_test_color_depth_from_info_y420_16bpc(9)Test Color depth from info y420 16bpc✨
dm_test_color_depth_from_info_y420_default(9)Test Color depth from info y420 default✨
dm_test_color_depth_from_info_zero_bpc_defaults_888(9)Test Color depth from info zero bpc defaults 888✨
dm_test_color_update_setup(9)allocate a minimal color update fixture✨
dm_test_colorop_3x4_matrix_applied(9)CTM 3x4 colorop enables gamut remap✨
dm_test_colorop_3x4_matrix_bad_length(9)Wrong blob length: must return -EINVAL✨
dm_test_colorop_degamma_no_match(9)Unsupported degamma curve: must return -EINVAL✨
dm_test_colorop_degamma_predefined(9)Degamma 1D curve programs predefined TF✨
dm_test_colorop_multiplier_applied(9)Multiplier colorop programs hdr_mult✨
dm_test_colorop_multiplier_no_match(9)Non-multiplier colorop leaves hdr_mult untouched✨
dm_test_colorop_pipeline_add(9)append one colorop to a fabricated pipeline✨
dm_test_colorop_pipeline_setup(9)build a linked colorop pipeline prefix✨
dm_test_colorop_setup(9)build a single-colorop atomic state fixture✨
dm_test_commit_audio_notifies_added_connector(9)Test addition notification✨
dm_test_commit_audio_notifies_removed_connector(9)Test removal notification✨
dm_test_commit_audio_skips_addition_without_stream(9)Test NULL stream skip✨
dm_test_commit_audio_skips_detached_connector(9)Test detached connector skip✨
dm_test_commit_audio_skips_without_modeset(9)Test no-modeset skip✨
dm_test_commit_audio_skips_without_new_crtc_state(9)Test missing CRTC state✨
dm_test_commit_audio_skips_without_stream_status(9)Test missing DC status✨
dm_test_commit_audio_skips_writeback_addition(9)Test writeback addition skip✨
dm_test_commit_audio_skips_writeback_removal(9)Test writeback removal skip✨
dm_test_construct_old_payload_empty_list(9)Test PBN/time-slot calc, empty list✨
dm_test_construct_old_payload_intervening(9)Test calc with an intervening payload✨
dm_test_content_type_cinema(9)Test Content type cinema✨
dm_test_content_type_game(9)Test Content type game✨
dm_test_content_type_graphics(9)Test Content type graphics✨
dm_test_content_type_no_data(9)Test Content type no data✨
dm_test_content_type_photo(9)Test Content type photo✨
dm_test_content_type_unknown_defaults_no_data(9)Test unknown content type defaults to no data✨
dm_test_convert_color_depth_bpc_mappings(9)Test Convert color depth bpc mappings✨
dm_test_convert_color_depth_bpc_unknown(9)Test Convert color depth bpc unknown✨
dm_test_copy_crtc_timing_copies_all_fields(9)Test all crtc timing fields copied✨
dm_test_copy_crtc_timing_leaves_non_crtc_fields(9)Test non-crtc fields untouched✨
dm_test_count_crtc_active_planes_mixed(9)Test counting across all plane cases✨
dm_test_count_crtc_active_planes_none(9)Test empty plane list counts zero✨
dm_test_cp_diff_desired_mode_changed(9)Test DESIRED->DESIRED with modeset forces true✨
dm_test_cp_diff_desired_no_change(9)Test steady DESIRED->DESIRED needs no update✨
dm_test_cp_diff_desired_to_enabled(9)Test DESIRED->ENABLED needs no update✨
dm_test_cp_diff_desired_to_undesired(9)Test DESIRED->UNDESIRED forces update✨
dm_test_cp_diff_hdcp_type_change(9)Test an HDCP content-type change forces true✨
dm_test_cp_diff_reenable_mode_changed(9)Test ENABLED->DESIRED with modeset forces true✨
dm_test_cp_diff_reenable_no_change(9)Test ENABLED->DESIRED without modeset restores ENABLED✨
dm_test_cp_diff_s3_undesired_to_enabled(9)Test the S3 UNDESIRED->ENABLED path forces true✨
dm_test_cp_diff_stream_reenabled(9)Test the stream removed-and-re- enabled path forces true✨
dm_test_cp_diff_undesired(9)Test UNDESIRED->UNDESIRED needs no update✨
dm_test_cp_diff_update_hdcp_hotplug(9)Test the update_hdcp hot-plug path forces true✨
dm_test_crc_source_should_start_dprx(9)Test dm_crc_source_should_start_dprx().✨
dm_test_crc_source_should_stop_dprx(9)Test dm_crc_source_should_stop_dprx().✨
dm_test_create_common_mode_overrides(9)Test common mode inherits native timing✨
dm_test_create_eml_sink_no_edid(9)Test the no-EDID branch creates no sink✨
dm_test_create_stream_existing_sink(9)Test the existing-sink retain path✨
dm_test_create_stream_fake_sink_success(9)Test a stream is built from a fake sink✨
dm_test_create_stream_scaling_src(9)Test the source rect follows the mode✨
dm_test_create_stream_sets_dm_context(9)Test dm_stream_context points to aconnector✨
dm_test_create_stream_virtual_signal(9)Test the fake sink yields a VIRTUAL signal✨
dm_test_create_validate_stream_null_dm_state(9)Test NULL state returns NULL✨
dm_test_crtc_complete_writeback_no_connector(9)Test no writeback connector returns false✨
dm_test_crtc_complete_writeback_not_pending(9)Test non-pending writeback returns false✨
dm_test_crtc_configure_crc_source_crtc(9)Test CRTC enable path.✨
dm_test_crtc_configure_crc_source_crtc_configure_fails(9)Test failure path.✨
dm_test_crtc_configure_crc_source_crtc_dcn36_poly(9)Test CRC poly select.✨
dm_test_crtc_configure_crc_source_dprx(9)Test DPRX configure path.✨
dm_test_crtc_configure_crc_source_dprx_dither(9)Test DPRX dither path.✨
dm_test_crtc_configure_crc_source_no_stream(9)Test missing stream handling.✨
dm_test_crtc_configure_crc_source_none(9)Test CRC disable path.✨
dm_test_crtc_destroy_state_no_stream(9)Test destroy frees a stream-less state✨
dm_test_crtc_destroy_state_releases_stream(9)Test destroy releases the stream✨
dm_test_crtc_disable_vblank_no_irq_installed(9)Test disable with IRQ uninstalled✨
dm_test_crtc_disable_vblank_queues_work(9)Test disable queues work without a stream✨
dm_test_crtc_disable_vblank_vrr(9)Test disable path releases IRQs on a VRR DC✨
dm_test_crtc_duplicate_state_copies_fields(9)Test duplicated state carries DM fields✨
dm_test_crtc_enable_vblank_crtc_irq_error(9)Test crtc IRQ failure aborts enable✨
dm_test_crtc_enable_vblank_full_path(9)Test the enable path runs to completion✨
dm_test_crtc_enable_vblank_in_reset(9)Test enable returns early during GPU reset✨
dm_test_crtc_enable_vblank_ips_restore(9)Test IPS/self-refresh vblank restore✨
dm_test_crtc_enable_vblank_ips_restore_replay(9)Test IPS restore via replay support✨
dm_test_crtc_enable_vblank_queues_work(9)Test enable queues vblank control work✨
dm_test_crtc_enable_vblank_rejects_unconfigured(9)Test vblank enable on disabled CRTC✨
dm_test_crtc_enable_vblank_vupdate_busy(9)Test vupdate failure aborts enable✨
dm_test_crtc_get_crc_sources(9)Test available CRC source strings.✨
dm_test_crtc_get_scanoutpos_invalid_crtc(9)Test invalid CRTC returns -EINVAL✨
dm_test_crtc_get_scanoutpos_no_stream(9)Test missing stream returns zero✨
dm_test_crtc_handle_crc_irq_disabled_source(9)Test disabled source exit.✨
dm_test_crtc_handle_crc_irq_dprx_after_skip(9)Test DPRX post-skip exit.✨
dm_test_crtc_handle_crc_irq_early_returns(9)Test null/missing state exits.✨
dm_test_crtc_handle_crc_irq_get_crc_fails(9)Test failed DC CRC read.✨
dm_test_crtc_handle_crc_irq_skips_initial_frames(9)Test initial skip logic.✨
dm_test_crtc_handle_vblank_completes_cursor_only(9)Test event sent on vblank✨
dm_test_crtc_handle_vblank_no_event(9)Test vblank handling with no pending event✨
dm_test_crtc_handle_vblank_skips_when_flip_submitted(9)Test event kept on submit✨
dm_test_crtc_helper_mode_fixup_returns_true(9)Test mode_fixup accepts mode✨
dm_test_crtc_high_irq_no_crtc(9)Test crtc high IRQ with no CRTC✨
dm_test_crtc_high_irq_vrr_ai_no_stream(9)Test crtc high IRQ AI path, no stream✨
dm_test_crtc_high_irq_vrr_pre_ai(9)Test crtc high IRQ VRR path on pre-AI ASIC✨
dm_test_crtc_is_headless_connected_display(9)Test Crtc is headless connected display✨
dm_test_crtc_is_headless_disconnected_display(9)Test Crtc is headless disconnected display✨
dm_test_crtc_is_headless_mixed_connectors(9)Test headless skips WB and finds display✨
dm_test_crtc_is_headless_no_connectors(9)Test Crtc is headless no connectors✨
dm_test_crtc_is_headless_null_adev(9)Test Crtc is headless null adev✨
dm_test_crtc_is_headless_writeback_only(9)Test Crtc is headless writeback only✨
dm_test_crtc_modeset_required_active_active_changed(9)Test Crtc modeset required active active changed✨
dm_test_crtc_modeset_required_active_connectors_changed(9)Test Crtc modeset required active connectors changed✨
dm_test_crtc_modeset_required_active_mode_changed(9)Test Crtc modeset required active mode changed✨
dm_test_crtc_modeset_required_inactive(9)Test Crtc modeset required inactive✨
dm_test_crtc_modeset_required_no_changes(9)Test Crtc modeset required no changes✨
dm_test_crtc_reset_state_allocates_state(9)Test reset installs a fresh state✨
dm_test_crtc_set_crc_source_dprx_no_connector(9)Test DPRX with no match.✨
dm_test_crtc_set_crc_source_invalid(9)Test invalid source guard.✨
dm_test_crtc_set_crc_source_none_commit(9)Test set-source with pending commit.✨
dm_test_crtc_set_crc_source_none_no_stream(9)Test valid source no-stream exit.✨
dm_test_crtc_set_static_screen_optimze_no_sr_entry(9)Test early return when SR entry disallowed✨
dm_test_crtc_set_static_screen_optimze_psr_su_skips(9)Test PSR SU skips PSR event✨
dm_test_crtc_set_static_screen_optimze_sr_entry_psr(9)Test SSO toggle drives PSR✨
dm_test_crtc_set_vupdate_irq_dc_busy(9)Test vupdate irq when DC rejects request✨
dm_test_crtc_set_vupdate_irq_enable(9)Test vupdate irq enable/disable success✨
dm_test_crtc_set_vupdate_irq_no_otg(9)Test vupdate irq with unassigned OTG✨
dm_test_crtc_update_active_planes_no_stream(9)Test active plane reset without a stream✨
dm_test_crtc_verify_crc_source_invalid(9)Test invalid CRC source verification.✨
dm_test_crtc_verify_crc_source_valid(9)Test valid CRC source verification.✨
dm_test_crtc_vrr_active_disabled(9)Test Crtc vrr active disabled✨
dm_test_crtc_vrr_active_fixed(9)Test Crtc vrr active fixed✨
dm_test_crtc_vrr_active_inactive(9)Test Crtc vrr active inactive✨
dm_test_crtc_vrr_active_irq_disabled(9)Test Crtc vrr active irq disabled✨
dm_test_crtc_vrr_active_irq_fixed(9)Test Crtc vrr active irq fixed✨
dm_test_crtc_vrr_active_irq_inactive(9)Test Crtc vrr active irq inactive✨
dm_test_crtc_vrr_active_irq_unsupported(9)Test Crtc vrr active irq unsupported✨
dm_test_crtc_vrr_active_irq_variable(9)Test Crtc vrr active irq variable✨
dm_test_crtc_vrr_active_unsupported(9)Test Crtc vrr active unsupported✨
dm_test_crtc_vrr_active_variable(9)Test Crtc vrr active variable✨
dm_test_custom_brightness_above_last(9)Test Custom brightness above last data point✨
dm_test_custom_brightness_below_first(9)Test Custom brightness below first✨
dm_test_custom_brightness_debug_mask_disables(9)Test Custom brightness debug mask disables✨
dm_test_custom_brightness_exact_match(9)Test Custom brightness exact match✨
dm_test_custom_brightness_interpolation(9)Test Custom brightness interpolation✨
dm_test_custom_brightness_lower_lum_zero(9)Test Custom brightness with zero lower luminance✨
dm_test_custom_brightness_no_data_points(9)Test Custom brightness no data points✨
dm_test_custom_brightness_single_data_point(9)Test Custom brightness with single data point✨
dm_test_dc_timing_adjust_active_fixed(9)Test VRR active-fixed forces true✨
dm_test_dc_timing_adjust_not_needed(9)Test steady-state timing needs no adjust✨
dm_test_dc_timing_adjust_pending(9)Test a pending hw timing adjust forces true✨
dm_test_dc_timing_adjust_vrr_toggle(9)Test a change in vrr active state forces true✨
dm_test_dc_to_pp_clock_type_dcefclk(9)Test DCEF clock type mapping✨
dm_test_dc_to_pp_clock_type_dcfclk(9)Test DCF clock type mapping✨
dm_test_dc_to_pp_clock_type_display(9)Test display clock type mapping✨
dm_test_dc_to_pp_clock_type_dppclk(9)Test DPP clock type mapping✨
dm_test_dc_to_pp_clock_type_engine(9)Test engine clock type mapping✨
dm_test_dc_to_pp_clock_type_fclk(9)Test FCLK type mapping✨
dm_test_dc_to_pp_clock_type_invalid(9)Test invalid clock type mapping✨
dm_test_dc_to_pp_clock_type_memory(9)Test memory clock type mapping✨
dm_test_dc_to_pp_clock_type_phyclk(9)Test display PHY clock type mapping✨
dm_test_dc_to_pp_clock_type_pixelclk(9)Test pixel clock type mapping✨
dm_test_dce110_register_irq_handlers_one_crtc(9)Test DCE110 with 1 CRTC✨
dm_test_dce110_register_irq_handlers_rejects_uninitialized_sources(9)Test DCE110 error✨
dm_test_dcn10_register_irq_handlers_one_crtc(9)Test DCN10 with 1 CRTC✨
dm_test_dcn10_register_irq_handlers_zero_crtc(9)Test DCN10 zero-CRTC registration✨
dm_test_ddc_get_modes_null_edid(9)Test a NULL EDID resets the mode count✨
dm_test_decide_crtc_timing_matching_mode(9)Test Decide crtc timing matching mode✨
dm_test_decide_crtc_timing_no_copy(9)Test Decide crtc timing no copy✨
dm_test_decide_crtc_timing_no_crtc_clock(9)Test Decide crtc timing no crtc clock✨
dm_test_decide_crtc_timing_scale_enabled(9)Test Decide crtc timing scale enabled✨
dm_test_default_clock_levels_display(9)Test display clock default levels✨
dm_test_default_clock_levels_engine(9)Test engine clock default levels✨
dm_test_default_clock_levels_memory(9)Test memory clock default levels✨
dm_test_default_clock_levels_unknown(9)Test unknown clock type default✨
dm_test_destroy_minimal(9)Test destroy tears down a bare connector✨
dm_test_destroy_releases_dc_em_sink(9)Test destroy releases the emulated sink✨
dm_test_destroy_releases_dc_sink(9)Test destroy releases the dc_sink✨
dm_test_detect_force_off(9)Test DRM_FORCE_OFF reports disconnected✨
dm_test_detect_force_on(9)Test DRM_FORCE_ON reports connected✨
dm_test_detect_force_on_digital(9)Test DRM_FORCE_ON_DIGITAL reports connected✨
dm_test_detect_mst_branch_without_aux(9)Test an MST branch with no aux is skipped✨
dm_test_detect_mst_no_connectors(9)Test the no-op path on an empty device✨
dm_test_detect_mst_non_mst_link(9)Test a non-MST link starts no topology✨
dm_test_detect_mst_skips_writeback(9)Test writeback connectors are skipped✨
dm_test_detect_no_sink(9)Test a missing dc_sink reports disconnected✨
dm_test_detect_sink_present(9)Test a present dc_sink reports connected✨
dm_test_dispatch_next_event_hyst_wait_no_delay(9)zero delay_ns: IMMEDIATE in HYSTERESIS_WAITING✨
dm_test_dispatch_next_event_hyst_wait_with_delay(9)delay_ns > 0, no IMMEDIATE event returned✨
dm_test_dispatch_next_event_no_action_state(9)other states return DM_ISM_NUM_EVENTS✨
dm_test_dispatch_next_event_opt_idle_no_sso_delay(9)sso_delay_ns == 0 triggers IMMEDIATE event✨
dm_test_dispatch_next_event_opt_idle_with_sso_delay(9)sso_delay_ns > 0, SSO timer, no IMMEDIATE✨
dm_test_dispatch_next_event_timer_aborted(9)TIMER_ABORTED always returns IMMEDIATE✨