section 9 · Kernel routines 🧠

87928 pages · page 302 of 440

all 9 (85608)9freebsd (2304)9lua (4)9p (12)

S (continued)

sdma_v4_4_2_inst_rlc_stop(9)stop the compute async dma engines✨
sdma_v4_4_2_inst_start(9)setup and start the async dma engines✨
sdma_v4_4_2_page_resume(9)setup and start the async dma engines✨
sdma_v4_4_2_page_ring_get_wptr(9)get the current write pointer✨
sdma_v4_4_2_page_ring_set_wptr(9)commit the write pointer✨
sdma_v4_4_2_ring_emit_fence(9)emit a fence on the DMA ring✨
sdma_v4_4_2_ring_emit_hdp_flush(9)emit an hdp flush on the DMA ring✨
sdma_v4_4_2_ring_emit_ib(9)Schedule an IB on the DMA engine✨
sdma_v4_4_2_ring_emit_pipeline_sync(9)sync the pipeline✨
sdma_v4_4_2_ring_emit_vm_flush(9)vm flush using sDMA✨
sdma_v4_4_2_ring_get_rptr(9)get the current read pointer✨
sdma_v4_4_2_ring_get_wptr(9)get the current write pointer✨
sdma_v4_4_2_ring_pad_ib(9)pad the IB to the required number of dw✨
sdma_v4_4_2_ring_set_wptr(9)commit the write pointer✨
sdma_v4_4_2_ring_test_ib(9)test an IB on the DMA engine✨
sdma_v4_4_2_ring_test_ring(9)simple async dma engine test✨
sdma_v4_4_2_update_reset_mask(9)update reset mask for SDMA✨
sdma_v4_4_2_vm_copy_pte(9)update PTEs by copying them from the GART✨
sdma_v4_4_2_vm_set_pte_pde(9)update the page tables using sDMA✨
sdma_v4_4_2_vm_write_pte(9)update PTEs by writing them manually✨
sdma_v5_0_ctx_switch_enable(9)stop the async dma engines context switch✨
sdma_v5_0_emit_copy_buffer(9)copy buffer using the sDMA engine✨
sdma_v5_0_emit_fill_buffer(9)fill buffer using the sDMA engine✨
sdma_v5_0_enable(9)stop the async dma engines✨
sdma_v5_0_gfx_resume(9)setup and start the async dma engines✨
sdma_v5_0_gfx_resume_instance(9)start/restart a certain sdma engine✨
sdma_v5_0_gfx_stop(9)stop the gfx async dma engines✨
sdma_v5_0_init_microcode(9)load ucode images from disk✨
sdma_v5_0_load_microcode(9)load the sDMA ME ucode✨
sdma_v5_0_ring_emit_fence(9)emit a fence on the DMA ring✨
sdma_v5_0_ring_emit_hdp_flush(9)emit an hdp flush on the DMA ring✨
sdma_v5_0_ring_emit_ib(9)Schedule an IB on the DMA engine✨
sdma_v5_0_ring_emit_mem_sync(9)flush the IB by graphics cache rinse✨
sdma_v5_0_ring_emit_pipeline_sync(9)sync the pipeline✨
sdma_v5_0_ring_emit_vm_flush(9)vm flush using sDMA✨
sdma_v5_0_ring_get_rptr(9)get the current read pointer✨
sdma_v5_0_ring_get_wptr(9)get the current write pointer✨
sdma_v5_0_ring_pad_ib(9)pad the IB✨
sdma_v5_0_ring_set_wptr(9)commit the write pointer✨
sdma_v5_0_ring_test_ib(9)test an IB on the DMA engine✨
sdma_v5_0_ring_test_ring(9)simple async dma engine test✨
sdma_v5_0_rlc_resume(9)setup and start the async dma engines✨
sdma_v5_0_rlc_stop(9)stop the compute async dma engines✨
sdma_v5_0_start(9)setup and start the async dma engines✨
sdma_v5_0_vm_copy_pte(9)update PTEs by copying them from the GART✨
sdma_v5_0_vm_set_pte_pde(9)update the page tables using sDMA✨
sdma_v5_0_vm_write_pte(9)update PTEs by writing them manually✨
sdma_v5_2_ctx_switch_enable(9)stop the async dma engines context switch✨
sdma_v5_2_emit_copy_buffer(9)copy buffer using the sDMA engine✨
sdma_v5_2_emit_fill_buffer(9)fill buffer using the sDMA engine✨
sdma_v5_2_enable(9)stop the async dma engines✨
sdma_v5_2_gfx_resume(9)setup and start the async dma engines✨
sdma_v5_2_gfx_resume_instance(9)start/restart a certain sdma engine✨
sdma_v5_2_gfx_stop(9)stop the gfx async dma engines✨
sdma_v5_2_load_microcode(9)load the sDMA ME ucode✨
sdma_v5_2_ring_emit_fence(9)emit a fence on the DMA ring✨
sdma_v5_2_ring_emit_hdp_flush(9)emit an hdp flush on the DMA ring✨
sdma_v5_2_ring_emit_ib(9)Schedule an IB on the DMA engine✨
sdma_v5_2_ring_emit_mem_sync(9)flush the IB by graphics cache rinse✨
sdma_v5_2_ring_emit_pipeline_sync(9)sync the pipeline✨
sdma_v5_2_ring_emit_vm_flush(9)vm flush using sDMA✨
sdma_v5_2_ring_get_rptr(9)get the current read pointer✨
sdma_v5_2_ring_get_wptr(9)get the current write pointer✨
sdma_v5_2_ring_pad_ib(9)pad the IB✨
sdma_v5_2_ring_set_wptr(9)commit the write pointer✨
sdma_v5_2_ring_test_ib(9)test an IB on the DMA engine✨
sdma_v5_2_ring_test_ring(9)simple async dma engine test✨
sdma_v5_2_rlc_resume(9)setup and start the async dma engines✨
sdma_v5_2_rlc_stop(9)stop the compute async dma engines✨
sdma_v5_2_start(9)setup and start the async dma engines✨
sdma_v5_2_vm_copy_pte(9)update PTEs by copying them from the GART✨
sdma_v5_2_vm_set_pte_pde(9)update the page tables using sDMA✨
sdma_v5_2_vm_write_pte(9)update PTEs by writing them manually✨
sdma_v6_0_ctxempty_int_enable(9)enable or disable context empty interrupts✨
sdma_v6_0_emit_copy_buffer(9)copy buffer using the sDMA engine✨
sdma_v6_0_emit_fill_buffer(9)fill buffer using the sDMA engine✨
sdma_v6_0_enable(9)stop the async dma engines✨
sdma_v6_0_gfx_resume(9)setup and start the async dma engines✨
sdma_v6_0_gfx_resume_instance(9)start/restart a certain sdma engine✨
sdma_v6_0_gfx_stop(9)stop the gfx async dma engines✨
sdma_v6_0_load_microcode(9)load the sDMA ME ucode✨
sdma_v6_0_ring_emit_fence(9)emit a fence on the DMA ring✨
sdma_v6_0_ring_emit_hdp_flush(9)emit an hdp flush on the DMA ring✨
sdma_v6_0_ring_emit_mem_sync(9)flush the IB by graphics cache rinse✨
sdma_v6_0_ring_emit_pipeline_sync(9)sync the pipeline✨
sdma_v6_0_ring_get_rptr(9)get the current read pointer✨
sdma_v6_0_ring_get_wptr(9)get the current write pointer✨
sdma_v6_0_ring_set_wptr(9)commit the write pointer✨
sdma_v6_0_ring_test_ring(9)simple async dma engine test✨
sdma_v6_0_rlc_resume(9)setup and start the async dma engines✨
sdma_v6_0_rlc_stop(9)stop the compute async dma engines✨
sdma_v6_0_start(9)setup and start the async dma engines✨
sdma_v6_0_vm_copy_pte(9)update PTEs by copying them from the GART✨
sdma_v6_0_vm_set_pte_pde(9)update the page tables using sDMA✨
sdma_v6_0_vm_write_pte(9)update PTEs by writing them manually✨
sdma_v7_0_ctx_switch_enable(9)stop the async dma engines context switch✨
sdma_v7_0_emit_copy_buffer(9)copy buffer using the sDMA engine✨
sdma_v7_0_emit_fill_buffer(9)fill buffer using the sDMA engine✨
sdma_v7_0_enable(9)stop the async dma engines✨
sdma_v7_0_gfx_resume(9)setup and start the async dma engines✨
sdma_v7_0_gfx_resume_instance(9)start/restart a certain sdma engine✨
sdma_v7_0_gfx_stop(9)stop the gfx async dma engines✨
sdma_v7_0_load_microcode(9)load the sDMA ME ucode✨
sdma_v7_0_ring_emit_fence(9)emit a fence on the DMA ring✨
sdma_v7_0_ring_emit_hdp_flush(9)emit an hdp flush on the DMA ring✨
sdma_v7_0_ring_emit_ib(9)Schedule an IB on the DMA engine✨
sdma_v7_0_ring_emit_mem_sync(9)flush the IB by graphics cache rinse✨
sdma_v7_0_ring_emit_pipeline_sync(9)sync the pipeline✨
sdma_v7_0_ring_emit_vm_flush(9)vm flush using sDMA✨
sdma_v7_0_ring_get_rptr(9)get the current read pointer✨
sdma_v7_0_ring_get_wptr(9)get the current write pointer✨
sdma_v7_0_ring_pad_ib(9)pad the IB✨
sdma_v7_0_ring_set_wptr(9)commit the write pointer✨
sdma_v7_0_ring_test_ib(9)test an IB on the DMA engine✨
sdma_v7_0_ring_test_ring(9)simple async dma engine test✨
sdma_v7_0_rlc_resume(9)setup and start the async dma engines✨
sdma_v7_0_rlc_stop(9)stop the compute async dma engines✨
sdma_v7_0_start(9)setup and start the async dma engines✨
sdma_v7_0_vm_copy_pte(9)update PTEs by copying them from the GART✨
sdma_v7_0_vm_set_pte_pde(9)update the page tables using sDMA✨
sdma_v7_0_vm_write_pte(9)update PTEs by writing them manually✨
sdma_v7_1_emit_copy_buffer(9)copy buffer using the sDMA engine✨
sdma_v7_1_emit_fill_buffer(9)fill buffer using the sDMA engine✨
sdma_v7_1_gfx_resume_instance(9)start/restart a certain sdma engine✨
sdma_v7_1_inst_ctx_switch_enable(9)stop the async dma engines context switch✨
sdma_v7_1_inst_enable(9)stop the async dma engines✨
sdma_v7_1_inst_gfx_resume(9)setup and start the async dma engines✨
sdma_v7_1_inst_gfx_stop(9)stop the gfx async dma engines✨
sdma_v7_1_inst_load_microcode(9)load the sDMA ME ucode✨
sdma_v7_1_inst_rlc_resume(9)setup and start the async dma engines✨
sdma_v7_1_inst_rlc_stop(9)stop the compute async dma engines✨
sdma_v7_1_inst_start(9)setup and start the async dma engines✨
sdma_v7_1_ring_emit_fence(9)emit a fence on the DMA ring✨
sdma_v7_1_ring_emit_ib(9)Schedule an IB on the DMA engine✨
sdma_v7_1_ring_emit_mem_sync(9)flush the IB by graphics cache rinse✨
sdma_v7_1_ring_emit_pipeline_sync(9)sync the pipeline✨
sdma_v7_1_ring_emit_vm_flush(9)vm flush using sDMA✨
sdma_v7_1_ring_get_rptr(9)get the current read pointer✨
sdma_v7_1_ring_get_wptr(9)get the current write pointer✨
sdma_v7_1_ring_pad_ib(9)pad the IB✨
sdma_v7_1_ring_set_wptr(9)commit the write pointer✨
sdma_v7_1_ring_test_ib(9)test an IB on the DMA engine✨
sdma_v7_1_ring_test_ring(9)simple async dma engine test✨
sdma_v7_1_vm_copy_pte(9)update PTEs by copying them from the GART✨
sdma_v7_1_vm_set_pte_pde(9)update the page tables using sDMA✨
sdma_v7_1_vm_write_pte(9)update PTEs by writing them manually✨
SDT(9)a DTrace framework for adding statically-defined tracing probes✨
SDT(9freebsd)a DTrace framework for adding statically-defined tracing probes✨
sdt_notes__get_count(9)Counts the number of sdt events✨
SDT_PROBE(9)a DTrace framework for adding statically-defined tracing probes✨
SDT_PROBE(9freebsd)a DTrace framework for adding statically-defined tracing probes✨
SDT_PROBE_DECLARE(9)a DTrace framework for adding statically-defined tracing probes✨
SDT_PROBE_DECLARE(9freebsd)a DTrace framework for adding statically-defined tracing probes✨
SDT_PROBE_DEFINE(9)a DTrace framework for adding statically-defined tracing probes✨
SDT_PROBE_DEFINE(9freebsd)a DTrace framework for adding statically-defined tracing probes✨
SDT_PROVIDER_DECLARE(9)a DTrace framework for adding statically-defined tracing probes✨
SDT_PROVIDER_DECLARE(9freebsd)a DTrace framework for adding statically-defined tracing probes✨
SDT_PROVIDER_DEFINE(9)a DTrace framework for adding statically-defined tracing probes✨
SDT_PROVIDER_DEFINE(9freebsd)a DTrace framework for adding statically-defined tracing probes✨
sdw_acquire_bus_lock(9)Acquire bus lock for all Master runtime(s)✨
sdw_alloc_stream(9)Allocate and return stream runtime✨
sdw_bus_clk_stop(9)stop bus clock✨
sdw_bus_exit_clk_stop(9)Exit clock stop mode✨
sdw_bus_master_add(9)add a bus Master instance✨
sdw_bus_master_delete(9)delete the bus master instance✨
sdw_bus_prep_clk_stop(9)prepare Slave(s) for clock stop✨
sdw_cdns_alloc_pdi(9)Allocate a PDI✨
sdw_cdns_clock_restart(9)Cadence PM clock restart configuration routine✨
sdw_cdns_clock_stop(9)Cadence clock stop configuration routine✨
sdw_cdns_config_stream(9)Configure a stream✨
sdw_cdns_config_update(9)Update configurations✨
sdw_cdns_config_update_set_wait(9)wait until configuration update bit is self-cleared✨
sdw_cdns_debugfs_init(9)Cadence debugfs init✨
sdw_cdns_enable_interrupt(9)Enable SDW interrupts✨
sdw_cdns_exit_reset(9)Program reset parameters and start bus operations✨
sdw_cdns_init(9)Cadence initialization✨
sdw_cdns_irq(9)Cadence interrupt handler✨
sdw_cdns_is_clock_stop(9)Check clock status✨
sdw_cdns_pdi_init(9)PDI initialization routine✨
sdw_cdns_probe(9)Cadence probe routine✨
sdw_cdns_soft_reset(9)Cadence soft-reset✨
sdw_compute_bus_params(9)Compute bus parameters✨
sdw_compute_params(9)Compute bus, transport and port parameters✨
sdw_compute_port_params(9)Compute transport and port parameters✨
sdw_config_stream(9)Configure the allocated stream✨
sdw_deprepare_stream(9)Deprepare SoundWire stream✨
sdw_disable_stream(9)Disable SoundWire stream✨
sdw_enable_disable_ports(9)Enable/disable port(s) for Master and Slave(s)✨
sdw_enable_disable_slave_ports(9)Enable/disable slave data port✨
sdw_enable_stream(9)Enable SoundWire stream✨
sdw_get_device_id(9)find the matching SoundWire device id✨
sdw_get_slave_dpn_prop(9)Get Slave port capabilities✨
sdw_handle_slave_status(9)Handle Slave status✨
sdw_intel_acpi_scan(9)SoundWire Intel init routine✨
sdw_intel_exit(9)SoundWire Intel exit✨
sdw_intel_probe(9)SoundWire Intel probe routine✨
sdw_intel_startup(9)SoundWire Intel startup✨
sdw_master_device_add(9)create a Linux Master Device representation.✨
sdw_master_device_del(9)delete a Linux Master Device representation.✨
sdw_master_read_prop(9)Read Master properties✨