sdma_v5_0_vm_write_pte(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… sdma_v5_0_vm_write_pte(9) πŸ’…

okay so bestie, welcome to the Kernel API Manual page for sdma_v5_0_vm_write_pte(9) β€” yes, that’s the whole title, and we’re folding it in right here at the top like a little name tag 🫢. this one is short, sweet, and literally about updating PTEs by hand, so let’s get into it ✨.


πŸŽ€ NAME πŸŽ€

sdma_v5_0_vm_write_pte β€” update PTEs by writing them manually πŸ’–


✨ SYNOPSIS ✨

void sdma_v5_0_vm_write_pte (struct amdgpu_ib *ib , uint64_t pe ,
       uint64_t value , unsigned count , uint32_t incr );

πŸ¦‹ ARGUMENTS πŸ¦‹

  • ib β€” indirect buffer to fill with commands πŸ› οΈ
  • pe β€” addr of the page entry πŸ“
  • value β€” dst addr to write into pe 🎯
  • count β€” number of page entries to update πŸ”’
  • incr β€” increase next addr by incr bytes πŸ“ˆ

🌸 DESCRIPTION 🌸

okay so the whole vibe here is: update PTEs by writing them manually using sDMA (NAVI10) πŸ’…. that’s it, that’s the function, and it’s giving very β€œdo it by hand, no cap” energy 🫢.


🌈 SEE ALSO 🌈

mwah πŸ’– β€” source/version ./drivers/gpu/drm/amd/amdgpu, date October 2026, manual Kernel API Manual, page sdma_v5_0_vm_write_pte(9). bye bestie 🫢

πŸ“¦ where this page comes from