sdma_v5_0_ctx_switch_enable(9)
π sdma_v5_0_ctx_switch_enable(9) β like, the kernel API manual, but make it make sense
okay bestie, so this is a page straight out of the Kernel API Manual, and it's about one very specific little function in the AMDGPU SDMA world. Buckle up π
β¨ NAME β¨
sdma_v5_0_ctx_switch_enable β stop the async dma engines context switch π
no cap, that's literally what the NAME section says: stop the async dma engines context switch. She's a stopper. An icon. π
πΈ SYNOPSIS πΈ
void sdma_v5_0_ctx_switch_enable (struct amdgpu_device *adev , bool
enable );
so she takes an amdgpu_device pointer and a bool, and she returns void β no little return value to obsess over, she just does the thing and leaves. main character energy honestly β¨
π¦ ARGUMENTS π¦
adevβ anamdgpu_devicepointer. that's your device bestie, the whole AMDGPU situation in one struct pointer π«Άenableβ enable/disable the DMA MEs context switch. yes it's a bool named enable and yes it also disables, that's just how she rolls π
π DESCRIPTION π
Halt or unhalt the async dma engines context switch, specifically for NAVI10. π₯
that's it. that's the whole vibe. you either halt it or you unhalt it, and enable tells her which one you're feeling today. NAVI10 only, iykyk β
π SEE ALSO π
the kernel file where all the magic lives, plus her entire friend group (she does not go anywhere without them):
./drivers/gpu/drm/amd/amdgpu/sdma_v5_0.csdma_v5_0_init_microcode(9)sdma_v5_0_ring_get_rptr(9)sdma_v5_0_ring_get_wptr(9)sdma_v5_0_ring_set_wptr(9)sdma_v5_0_ring_emit_ib(9)sdma_v5_0_ring_emit_mem_sync(9)sdma_v5_0_ring_emit_hdp_flush(9)sdma_v5_0_ring_emit_fence(9)sdma_v5_0_gfx_stop(9)sdma_v5_0_rlc_stop(9)sdma_v5_0_enable(9)sdma_v5_0_gfx_resume_instance(9)sdma_v5_0_gfx_resume(9)sdma_v5_0_rlc_resume(9)sdma_v5_0_load_microcode(9)sdma_v5_0_start(9)sdma_v5_0_ring_test_ring(9)sdma_v5_0_ring_test_ib(9)sdma_v5_0_vm_copy_pte(9)sdma_v5_0_vm_write_pte(9)sdma_v5_0_vm_set_pte_pde(9)sdma_v5_0_ring_pad_ib(9)sdma_v5_0_ring_emit_pipeline_sync(9)sdma_v5_0_ring_emit_vm_flush(9)sdma_v5_0_emit_copy_buffer(9)sdma_v5_0_emit_fill_buffer(9)
and that's the whole page, bestie π this little gem lives in ./drivers/gpu/drm/amd/amdgpu, and the source/version + date situation is October 2026 β so mark your calendar, she's dated, she's documented, she's done. mwah ππ§
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms