sdma_v5_2_vm_write_pte(9)

📦 version 7.3.1, in nixpkgs unstable

💅 sdma_v5_2_vm_write_pte(9) — like, the Kernel API Manual page, bestie ✨

okay so picture this: it's a page from the Kernel API Manual, and honestly? it's a whole little vibe. it's sdma_v5_2_vm_write_pte(9), and no cap, it's lowkey iconic if you're into GPU memory management (iykyk 🫶).

🌸 NAME 🌸

sdma_v5_2_vm_write_pte — update PTEs by writing them manually 💖

like, you're literally hand-writing page table entries. main character energy fr.

✨ SYNOPSIS ✨

void sdma_v5_2_vm_write_pte (struct amdgpu_ib *ib , uint64_t pe ,
uint64_t value , unsigned count , uint32_t incr );

that's the whole signature, bestie. don't skip a single character of it, okay? 😭

🎀 ARGUMENTS 🎀

okay so every single one of these matters, let's go:

  • ib — indirect buffer to fill with commands. this is the little command sandwich you're stuffing ✨
  • pe — addr of the page entry. yes, addr, that's how the page spells it, don't @ me 💅
  • value — dst addr to write into pe. so this is the destination address that goes into that page entry 🎯
  • count — number of page entries to update. not one, not two, count of them 👑
  • incr — increase next addr by incr bytes. so after each one, you bump the address forward by this many bytes 🦋

🦋 DESCRIPTION 🦋

Update PTEs by writing them manually using sDMA. that's it, that's the whole thing 💀

like yeah, it sounds simple, but the way it does it — manually, with sDMA doing the writes — is the whole point. no shortcuts, no fancy auto-magic, you're just writing those page table entries yourself and honestly? respect. 🙈

⭐ SEE ALSO ⭐

the friend group, the whole squad, the entire roster — every single one of them:

all 25 of them, none skipped, periodt 💅✨

ngl bestie, this page is short but it ate. now go fill that indirect buffer 🌈

this cutie came from ./drivers/gpu/drm/amd/amdgpu, dated October 2026, and it's titled sdma_v5_2_vm_write_pte(9) — love that for us, mwah 😘💖🎀

📦 where this page comes from