_omap3_noncore_dpll_lock(9)

🌸 NAME 🌸

_omap3_noncore_dpll_lock — instruct a DPLL to lock and wait for readiness 💖

Okay bestie, welcome to the Kernel API Manual page for _omap3_noncore_dpll_lock — yes, we're literally doing this, and yes, it's giving clock-framework main character energy 👑.

✨ SYNOPSIS ✨

int _omap3_noncore_dpll_lock (struct clk_hw_omap *clk );

🎀 ARGUMENTS 🎀

• clk — pointer to a DPLL struct clk 💅

💖 DESCRIPTION 💖

Okay so here's the vibe: this one instructs a non-CORE DPLL to lock. It waits for the DPLL to report readiness before returning — no rushing the process, bestie 😭.

It will save and restore the DPLL's autoidle state across the enable, per the CDP code. That's the whole little glow-up ✨.

If the DPLL locked successfully, it returns 0; if the DPLL did not lock in the time allotted, or DPLL3 was passed in, it returns -EINVAL — periodt 💀.

🦋 SEE ALSO 🦋

Kernel file ./drivers/clk/ti/dpll3xxx.c — and honestly, the whole clique is right here:

• _omap3_noncore_dpll_bypass(9)
• _omap3_noncore_dpll_stop(9)
• _lookup_dco(9)
• _lookup_sddiv(9)
• omap3_noncore_dpll_ssc_program(9)
• omap3_noncore_dpll_program(9)
• omap3_dpll_recalc(9)
• omap3_noncore_dpll_enable(9)
• omap3_noncore_dpll_disable(9)
• omap3_noncore_dpll_determine_rate(9)
• omap3_noncore_dpll_set_parent(9)
• omap3_noncore_dpll_set_rate(9)
• omap3_noncore_dpll_set_rate_and_parent(9)
• omap3_dpll_autoidle_read(9)
• omap3_dpll_allow_idle(9)
• omap3_dpll_deny_idle(9)
• omap3_clkoutx2_recalc(9)
• omap3_core_dpll_save_context(9)
• omap3_core_dpll_restore_context(9)
• omap3_noncore_dpll_save_context(9)
• omap3_noncore_dpll_restore_context(9)
• omap3_dpll4_set_rate(9)
• omap3_dpll4_set_rate_and_parent(9)
• omap3_dpll5_set_rate(9)

okay that's the whole page, bestie 🫶 — source/version: ./drivers/clk/ti, date: October 2026, and the page title is literally _omap3_noncore_dpll_lock(9) 💜✨