_lookup_dco(9)

💅 _lookup_dco(9) — like, the Kernel API Manual, bestie ✨

okay so we're in section 9 of the kernel API manual and this page is literally about the digital control oscillator lookup that the j-type DPLL uses — _lookup_dco, no cap 🎀

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🌸 NAME 🌸

_lookup_dco — lookup the DCO (digital control oscillator) that the j-type DPLL is using 💫

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✨ SYNOPSIS ✨

void _lookup_dco (struct clk_hw_omap *clk , u8 *dco , u16 m , u8 n );

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🦋 ARGUMENTS 🦋

• clk — pointer to a DPLL struct clk 👑 (that's the clock thingy we're messing with)
• dco — the digital control oscillator selector 🎛️
• m — the DPLL multiplier to set ✖️
• n — the DPLL divider to set ➗

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🎀 DESCRIPTION 🎀

go read 36xx TRM section 3.5.3.3.3.2 "Type B DPLL (Low-Jitter)" — that's where the lore lives, fr fr 📖✨

XXX — this code is not needed for 3430/AM35xx; can it be optimized out in non-multi-OMAP builds for those chips? 🤔 like, genuinely asking, someone pls confirm 🙈

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💜 SEE ALSO 💜

kernel file ./drivers/clk/ti/dpll3xxx.c, plus the whole friend group 🫶:

• _omap3_noncore_dpll_lock(9)
• _omap3_noncore_dpll_bypass(9)
• _omap3_noncore_dpll_stop(9)
• _lookup_sddiv(9)
• omap3_noncore_dpll_ssc_program(9)
• omap3_noncore_dpll_program(9)
• omap3_dpll_recalc(9)
• omap3_noncore_dpll_enable(9)
• omap3_noncore_dpll_disable(9)
• omap3_noncore_dpll_determine_rate(9)
• omap3_noncore_dpll_set_parent(9)
• omap3_noncore_dpll_set_rate(9)
• omap3_noncore_dpll_set_rate_and_parent(9)
• omap3_dpll_autoidle_read(9)
• omap3_dpll_allow_idle(9)
• omap3_dpll_deny_idle(9)
• omap3_clkoutx2_recalc(9)
• omap3_core_dpll_save_context(9)
• omap3_core_dpll_restore_context(9)
• omap3_noncore_dpll_save_context(9)
• omap3_noncore_dpll_restore_context(9)
• omap3_dpll4_set_rate(9)
• omap3_dpll4_set_rate_and_parent(9)
• omap3_dpll5_set_rate(9)

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and that's the whole vibe check 💅 this iconic little page lives in ./drivers/clk/ti and it was dated October 2026 — go off, calendar 📅💖 iykyk 🧚