ice_write_quad_reg_e82x(9)

📦 version 7.3.1, in nixpkgs unstable

🧚 ice_write_quad_reg_e82x(9) — Kernel API Manual 🧚

💖 NAME 💖

ice_write_quad_reg_e82x — write a PHY quad register, bestie. That's the whole assignment. ✨

🌈 SYNOPSIS 🌈

okay so here's the signature in all its glory:

int ice_write_quad_reg_e82x (struct ice_hw *hw , u8 quad , u16 offset ,
u32 val );

🎀 ARGUMENTS 🎀

  • hw — pointer to the HW struct, periodt.
  • quad — quad to write to.
  • offset — quad register offset to write.
  • val — The value to write to the register.

💅 DESCRIPTION 💅

It writes a PHY quad register over the device sideband queue. And the lore that matters: quad registers are shared between multiple PHYs, so it's giving shared custody, not private property. 💅

🔥 SEE ALSO 🔥

Kernel file: ./drivers/net/ethernet/intel/ice/ice_ptp_hw.c — that's the home base, bestie. 🏡

The see-also list is giving linked-in-bio energy, and no cap, it's iconic-long:

okay that's the whole page, mwah 💋 — source/version: ./drivers/net/ethernet/intel/ice, date: October 2026, manual name: ice_write_quad_reg_e82x(9). periodt. 🎀

📦 where this page comes from