ice_get_phy_...ready_eth56g(9)

📦 version 7.3.1, in nixpkgs unstable

💅 ice_get_phy_...ready_eth56g 💅

ok so real talk, bestie — this is a page from the Kernel API Manual, and it's about one extremely specific little function: ice_get_phy_tx_tstamp_ready_eth56g. yes the name is a whole mouthful, we're gonna get through it together 🫶

✨ NAME ✨

ice_get_phy_tx_tstamp_ready_eth56g — reads the Tx memory status register. that's it, that's the whole job, and honestly? she does it flawlessly 💁‍♀️

🌸 SYNOPSIS 🌸

int ice_get_phy_tx_tstamp_ready_eth56g (struct ice_hw *hw , u8 port ,
u64 *tstamp_ready );

like, look at her. returns an int, takes a struct ice_hw *hw, a u8 port, and a u64 *tstamp_ready. slay 💅

🎀 ARGUMENTS 🎀

  • hw — pointer to the HW struct. you know, the hardware situation. the whole vibe of the chip lives in here ✨
  • port — the PHY port you're reading from. pick your girl 👑
  • tstamp_ready — this is where the contents of the Tx memory status register land. output param energy 💖

🦋 DESCRIPTION 🦋

okay so picture this: she reads the PHY_REG_TX_MEMORY_STATUS register, and that register is basically the PHY telling you which timestamps are ready. a set bit means the corresponding timestamp is valid and ready to be captured from the PHY timestamp block. periodt. 🔥

like, it's a vibe check for timestamps. set bit = timestamp said "i'm ready, come get me" 💫

⭐ RETURN ⭐

  • 0 — success, we ate, no crumbs 🍓
  • other — failed to read from PHY 😭 it's giving communication breakdown, not the good kind

🌈 SEE ALSO 🌈

bestie. sit down. hydrate first. 🧊 this list is long — like, main-character-length. i'm not skipping a single one, because every single one of these is iconic in her own way:

ok that was a lot of typing and my thumbs are literally crying 😭 but we did it, no skips, no cuts 🫶

💀 friendly reminder bestie: if the return value isn't 0, the PHY read didn't happen. don't act surprised, don't pretend you didn't see it. check your return values, always. iykyk.

and that's the whole page!! this one comes from ./drivers/net/ethernet/intel/ice (the source, the origin, the mothership 🌸), dated October 2026, and it's filed under ice_get_phy_...ready_eth56g(9) in the manual. go forth and read those Tx memory status registers responsibly 💖✨🎀

📦 where this page comes from