STRUCT CLK_OPS(9)

okay bestie, this is the struct clk_ops(9) page from the Kernel API Manual — clock callback ops, and yes we're making it cute. It's giving "hardware clock homework but make it make sense" energy. 🕰️✨

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💖 NAME 💖

• struct clk_ops — Callback operations for hardware clocks; these are to be provided by the clock implementation, and will be called by drivers through the clk_* api. 💅

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✨ SYNOPSIS ✨

       struct clk_ops {
           int (*prepare)(struct clk_hw *hw);
           void (*unprepare)(struct clk_hw *hw);
           int (*is_prepared)(struct clk_hw *hw);
           void (*unprepare_unused)(struct clk_hw *hw);
           int (*enable)(struct clk_hw *hw);
           void (*disable)(struct clk_hw *hw);
           int (*is_enabled)(struct clk_hw *hw);
           void (*disable_unused)(struct clk_hw *hw);
           int (*save_context)(struct clk_hw *hw);
           void (*restore_context)(struct clk_hw *hw);
           unsigned long   (*recalc_rate)(struct clk_hw *hw, unsigned long
       parent_rate);
           int (*determine_rate)(struct clk_hw *hw, struct clk_rate_request
       *req);
           int (*set_parent)(struct clk_hw *hw, u8 index);
           u8 (*get_parent)(struct clk_hw *hw);
           int (*set_rate)(struct clk_hw *hw, unsigned long rate, unsigned long
       parent_rate);
           int (*set_rate_and_parent)(struct clk_hw *hw, unsigned long rate,
       unsigned long parent_rate, u8 index);
           int (*set_spread_spectrum)(struct clk_hw *hw, const struct
       clk_spread_spectrum *ss_conf);
           unsigned long   (*recalc_accuracy)(struct clk_hw *hw, unsigned long
       parent_accuracy);
           int (*get_phase)(struct clk_hw *hw);
           int (*set_phase)(struct clk_hw *hw, int degrees);
           int (*get_duty_cycle)(struct clk_hw *hw, struct clk_duty *duty);
           int (*set_duty_cycle)(struct clk_hw *hw, struct clk_duty *duty);
           int (*init)(struct clk_hw *hw);
           void (*terminate)(struct clk_hw *hw);
           void (*debug_init)(struct clk_hw *hw, struct dentry *dentry);
        };

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🎀 Members 🎀

• prepare — Prepare the clock for enabling. This must not return until the clock is fully prepared, and it's safe to call clk_enable. This callback is intended to allow clock implementations to do any initialisation that may sleep. Called with prepare_lock held. 😴💖
• unprepare — Release the clock from its prepared state. This will typically undo any work done in the prepare callback. Called with prepare_lock held.
• is_prepared — Queries the hardware to determine if the clock is prepared. This function is allowed to sleep. Optional, if this op is not set then the prepare count will be used.
• unprepare_unused — Unprepare the clock atomically. Only called from clk_disable_unused for prepare clocks with special needs. Called with prepare mutex held. This function may sleep.
• enable — Enable the clock atomically. This must not return until the clock is generating a valid clock signal, usable by consumer devices. Called with enable_lock held. This function must not sleep. 💀🔥
• disable — Disable the clock atomically. Called with enable_lock held. This function must not sleep.
• is_enabled — Queries the hardware to determine if the clock is enabled. This function must not sleep. Optional, if this op is not set then the enable count will be used.
• disable_unused — Disable the clock atomically. Only called from clk_disable_unused for gate clocks with special needs. Called with enable_lock held. This function must not sleep.
• save_context — Save the context of the clock in preparation for poweroff. 🔋
• restore_context — Restore the context of the clock after a restoration of power. ⚡
• recalc_rate — Recalculate the rate of this clock, by querying hardware. The parent rate is an input parameter. It is up to the caller to ensure that the prepare_mutex is held across this call. If the driver cannot figure out a rate for this clock, it must return 0. Returns the calculated rate. Optional, but recommended — if this op is not set then clock rate will be initialized to 0.
• determine_rate — Given a target rate as input, returns the closest rate actually supported by the clock, and optionally the parent clock that should be used to provide the clock rate. 🎯
• set_parent — Change the input source of this clock; for clocks with multiple possible parents specify a new parent by passing in the index as a u8 corresponding to the parent in either the .parent_names or .parents arrays. This function in effect translates an array index into the value programmed into the hardware. Returns 0 on success, -EERROR otherwise.
• get_parent — Queries the hardware to determine the parent of a clock. The return value is a u8 which specifies the index corresponding to the parent clock. This index can be applied to either the .parent_names or .parents arrays. In short, this function translates the parent value read from hardware into an array index. Currently only called when the clock is initialized by __clk_init. This callback is mandatory for clocks with multiple parents. It is optional (and unnecessary) for clocks with 0 or 1 parents.
• set_rate — Change the rate of this clock. The requested rate is specified by the second argument, which should typically be the return of .determine_rate call. The third argument gives the parent rate which is likely helpful for most .set_rate implementation. Returns 0 on success, -EERROR otherwise.
• set_rate_and_parent — Change the rate and the parent of this clock. The requested rate is specified by the second argument, which should typically be the return of clk_round_rate call. The third argument gives the parent rate which is likely helpful for most .set_rate_and_parent implementation. The fourth argument gives the parent index. This callback is optional (and unnecessary) for clocks with 0 or 1 parents as well as for clocks that can tolerate switching the rate and the parent separately via calls to .set_parent and .set_rate. Returns 0 on success, -EERROR otherwise.
• set_spread_spectrum — Optional callback used to configure the spread spectrum modulation frequency, percentage, and method to reduce EMI by spreading the clock frequency over a wider range. Returns 0 on success, -EERROR otherwise. 📡✨
• recalc_accuracy — Recalculate the accuracy of this clock. The clock accuracy is expressed in ppb (parts per billion). The parent accuracy is an input parameter. Returns the calculated accuracy. Optional — if this op is not set then clock accuracy will be initialized to parent accuracy or 0 (perfect clock) if clock has no parent.
• get_phase — Queries the hardware to get the current phase of a clock. Returned values are 0-359 degrees on success, negative error codes on failure.
• set_phase — Shift the phase of this clock signal in degrees specified by the second argument. Valid values for degrees are 0-359. Return 0 on success, otherwise -EERROR.
• get_duty_cycle — Queries the hardware to get the current duty cycle ratio of a clock. The returned values' denominator cannot be 0 and must be superior or equal to the numerator.
• set_duty_cycle — Apply the duty cycle ratio to this clock signal specified by the numerator (2nd argument) and denominator (3rd argument). Argument must be a valid ratio (denominator > 0 and >= numerator). Return 0 on success, otherwise -EERROR.
• init — Perform platform-specific initialization magic. This is not used by any of the basic clock types. This callback exists for HW which needs to perform some initialisation magic for CCF to get an accurate view of the clock. It may also be used when dynamic resource allocation is required. It shall not be used to deal with clock parameters, such as rate or parents. Returns 0 on success, -EERROR otherwise. 🪄
• terminate — Free any resource allocated by init.
• debug_init — Set up type-specific debugfs entries for this clock. This is called once, after the debugfs directory entry for this clock has been created. The dentry pointer representing that directory is provided as an argument. Called with prepare_lock held. Returns 0 on success, -EERROR otherwise.

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🌸 Description 🌸

The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow implementations to split any work between atomic (enable) and sleepable (prepare) contexts. If enabling a clock requires code that might sleep, this must be done in clk_prepare. Clock enable code that will never be called in a sleepable context may be implemented in clk_enable.

Typically, drivers will call clk_prepare when a clock may be needed later (eg. when a device is opened), and clk_enable when the clock is actually required (eg. from an interrupt).

🚨 Note that clk_prepare MUST have been called before clk_enable. periodt. 💅

🌈 SEE ALSO 🌈

okay bestie, this is the part where we hand you the whole friend group 💖 every single one of these is a real page you can pull up with man 9 <name>, so go be nosy:

• Kernel file ./include/linux/clk-provider.h — the actual header this whole page is describing, the mothership 🛸
• clk framework flags(9) — the flags situation for the clk framework
• struct clk_rate_request(9) — the struct for a rate request
• struct clk_duty(9) — the duty-cycle struct, yes it's a whole vibe
• struct clk_spread_spectrum(9) — the spread-spectrum struct, she's spreading ✨
• struct clk_parent_data(9) — parent data, the family tree info
• struct clk_init_data(9) — init data, the setup bag
• struct clk_hw(9) — the hardware-side clock struct, main character energy 👑
• struct clk_fixed_rate(9) — fixed-rate clock struct
• clk_hw_register_fixed_rate(9) — registers a fixed-rate clock
• devm_clk_hw_register_fixed_rate(9) — same thing but devm-managed, so cleanup is automatic 🧹
• devm_clk_hw_register_fixed_rate_parent_data(9) — devm-managed, with parent data
• clk_hw_register_fixed_rate_parent_hw(9) — fixed-rate, parent given as a hw pointer
• clk_hw_register_fixed_rate_parent_data(9) — fixed-rate, parent given as parent data
• clk_hw_register_fixed_rate_with_accuracy(9) — fixed-rate, but with accuracy on top 🎯
• clk_hw_register_fixed_rate_with_accuracy_parent_hw(9) — accuracy + parent hw
• clk_hw_register_fixed_rate_with_accuracy_parent_data(9) — accuracy + parent data
• clk_hw_register_fixed_rate_parent_accuracy(9) — fixed-rate, parent accuracy flavor
• struct clk_gate(9) — the gate struct, she gates, she slays 💅
• clk_hw_register_gate(9) — registers a gate clock
• clk_hw_register_gate_parent_hw(9) — gate registration, parent as hw
• clk_hw_register_gate_parent_data(9) — gate registration, parent as parent data
• devm_clk_hw_register_gate(9) — devm gate registration
• devm_clk_hw_register_gate_parent_hw(9) — devm gate, parent hw
• devm_clk_hw_register_gate_parent_data(9) — devm gate, parent data
• struct clk_divider(9) — divider struct, she divides (math, not drama) ➗
• clk_register_divider(9) — the divider register call
• clk_hw_register_divider(9) — hw-side divider registration
• clk_hw_register_divider_parent_hw(9) — divider registration, parent hw
• clk_hw_register_divider_parent_data(9) — divider registration, parent data
• clk_hw_register_divider_table(9) — divider registration with a table
• clk_hw_register_divider_table_parent_hw(9) — table + parent hw
• clk_hw_register_divider_table_parent_data(9) — table + parent data
• devm_clk_hw_register_divider(9) — devm divider registration
• devm_clk_hw_register_divider_parent_hw(9) — devm divider, parent hw
• devm_clk_hw_register_divider_parent_data(9) — devm divider, parent data
• devm_clk_hw_register_divider_table(9) — devm divider with a table
• struct clk_mux(9) — mux struct, she picks one of many 🔀
• struct clk_fixed_factor(9) — fixed-factor struct
• devm_clk_hw_register_fixed_factor_parent_hw(9) — devm fixed-factor registration, parent hw
• struct clk_fractional_divider(9) — fractional divider struct, fractions but make it fashion
• struct clk_multiplier(9) — multiplier struct, she multiplies ✖️
• clk_hw_get_dev(9) — grabs the device for a clk_hw
• clk_hw_get_of_node(9) — grabs the of_node for a clk_hw 🌳

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and that's the whole page, bestie, you made it to the end 🫶 go forth and register your clocks responsibly, ily 😭💖

source: <green>./include/linux</green> • October 2026 • this whole lovely mess is struct clk_ops(9) ✨🎀