devm_clk_hw_...er_parent_hw(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ devm_clk_hw_...er_parent_hw(9) ✨

okay bestie so this is a page straight out of the Kernel API Manual (yes, the devm_clk_hw_...er_parent_hw(9) one, we been knew πŸ’…) and it's literally about registering a divider clock with the clock framework. That's it. That's the whole vibe. Clock girlies rise πŸ•βœ¨


🌸 NAME 🌸

devm_clk_hw_register_divider_parent_hw β€” register a divider clock with the clock framework πŸŽ€


πŸ¦‹ SYNOPSIS πŸ¦‹

devm_clk_hw_register_divider_parent_hw (dev , name , parent_hw , flags ,
reg , shift , width , clk_divider_flags , lock );

πŸ’– ARGUMENTS πŸ’–

  • dev β€” the device that's registering this clock, like it's the one signing the permission slip 🫢
  • name β€” the name of this clock, its whole identity fr fr
  • parent_hw β€” pointer to the parent clk, aka who it's descended from πŸ‘‘
  • flags β€” framework-specific flags, the general framework kinda settings
  • reg β€” the register address you adjust to set the divider
  • shift β€” how many bits to shift the bitfield, the little slide-over
  • width β€” the width of the bitfield, how many bits wide it is, no cap
  • clk_divider_flags β€” divider-specific flags for this clock, like the framework flags but for divider business specifically
  • lock β€” the shared register lock for this clock, so nobody touches the registers at the same time πŸ”’

πŸ”₯ SEE ALSO πŸ”₯

Kernel file ./include/linux/clk-provider.h, clk framework flags(9), struct clk_rate_request(9), struct clk_duty(9), struct clk_spread_spectrum(9), struct clk_ops(9), struct clk_parent_data(9), struct clk_init_data(9), struct clk_hw(9), struct clk_fixed_rate(9), clk_hw_register_fixed_rate(9), devm_clk_hw_register_fixed_rate(9), devm_clk_hw_register_fixed_rate_parent_data(9), clk_hw_register_fixed_rate_parent_hw(9), clk_hw_register_fixed_rate_parent_data(9), clk_hw_register_fixed_rate_with_accuracy(9), clk_hw_register_fixed_rate_with_accuracy_parent_hw(9), clk_hw_register_fixed_rate_with_accuracy_parent_data(9), clk_hw_register_fixed_rate_parent_accuracy(9), struct clk_gate(9), clk_hw_register_gate(9), clk_hw_register_gate_parent_hw(9), clk_hw_register_gate_parent_data(9), devm_clk_hw_register_gate(9), devm_clk_hw_register_gate_parent_hw(9), devm_clk_hw_register_gate_parent_data(9), struct clk_divider(9), clk_register_divider(9), clk_hw_register_divider(9), clk_hw_register_divider_parent_hw(9), clk_hw_register_divider_parent_data(9), clk_hw_register_divider_table(9), clk_hw_register_divider_table_parent_hw(9), clk_hw_register_divider_table_parent_data(9), devm_clk_hw_register_divider(9), devm_clk_hw_register_divider_parent_data(9), devm_clk_hw_register_divider_table(9), struct clk_mux(9), struct clk_fixed_factor(9), devm_clk_hw_register_fixed_factor_parent_hw(9), struct clk_fractional_divider(9), struct clk_multiplier(9), clk_hw_get_dev(9), clk_hw_get_of_node(9)


and that's the whole page bestie, go forth and register ur dividers πŸ’œ

mwah πŸ’‹ this cutie lives in ./include/linux and it's dated October 2026 β€” xoxo, the Kernel API Manual 🌈

πŸ“¦ where this page comes from