clk_hw_regi..._parent_data(9)

✨ NAME ✨

okay so bestie, welcome to the Kernel API Manual — this is the page for clk_hw_register_divider_table_parent_data, and its whole main character job is to register a table based divider clock with the clock framework. that's the vibe, no cap 💅✨

🌸 SYNOPSIS 🌸

here's the exact call shape, copied with love and zero edits:

       clk_hw_register_divider_table_parent_data (dev , name , parent_data ,
       flags , reg , shift , width , clk_divider_flags , table , lock );

🎀 ARGUMENTS 🎀

• dev — the device registering this clock, periodt.
• name — the name of this clock. name it something cute but, like, accurate 🎀
• parent_data — the parent clk data. that's the whole note, bestie.
• flags — framework-specific flags. keep an eye on these 👀
• reg — the register address to adjust the divider.
• shift — the number of bits to shift the bitfield. bit math era 💅
• width — the width of the bitfield.
• clk_divider_flags — divider-specific flags for this clock. yep, that's the divider flavor 🌸
• table — the array of divider/value pairs ending with a div set to 0. that 0 terminator is giving end-of-list energy 🛑✨
• lock — the shared register lock for this clock. share it nicely, bestie 🫶

🦋 SEE ALSO 🦋

like, go read these too — the whole squad is here, fr fr:

• Kernel file ./include/linux/clk-provider.h clk framework flags(9)
• struct clk_rate_request(9)
• struct clk_duty(9)
• struct clk_spread_spectrum(9)
• struct clk_ops(9)
• struct clk_parent_data(9)
• struct clk_init_data(9)
• struct clk_hw(9)
• struct clk_fixed_rate(9)
• clk_hw_register_fixed_rate(9)
• devm_clk_hw_register_fixed_rate(9)
• devm_clk_hw_register_fixed_rate_parent_data(9)
• clk_hw_register_fixed_rate_parent_hw(9)
• clk_hw_register_fixed_rate_parent_data(9)
• clk_hw_register_fixed_rate_with_accuracy(9)
• clk_hw_register_fixed_rate_with_accuracy_parent_hw(9)
• clk_hw_register_fixed_rate_with_accuracy_parent_data(9)
• clk_hw_register_fixed_rate_parent_accuracy(9)
• struct clk_gate(9)
• clk_hw_register_gate(9)
• clk_hw_register_gate_parent_hw(9)
• clk_hw_register_gate_parent_data(9)
• devm_clk_hw_register_gate(9)
• devm_clk_hw_register_gate_parent_hw(9)
• devm_clk_hw_register_gate_parent_data(9)
• struct clk_divider(9)
• clk_register_divider(9)
• clk_hw_register_divider(9)
• clk_hw_register_divider_parent_hw(9)
• clk_hw_register_divider_parent_data(9)
• clk_hw_register_divider_table(9)
• clk_hw_register_divider_table_parent_hw(9)
• devm_clk_hw_register_divider(9)
• devm_clk_hw_register_divider_parent_hw(9)
• devm_clk_hw_register_divider_parent_data(9)
• devm_clk_hw_register_divider_table(9)
• struct clk_mux(9)
• struct clk_fixed_factor(9)
• devm_clk_hw_register_fixed_factor_parent_hw(9)
• struct clk_fractional_divider(9)
• struct clk_multiplier(9)
• clk_hw_get_dev(9)
• clk_hw_get_of_node(9)

that's the whole page, bestie 🫶 — source: ./include/linux; date: October 2026; page: clk_hw_regi..._parent_data(9) from the Kernel API Manual. byeee 👋💖