clk_hw_regi...ivider_table(9)

💅 clk_hw_regi...ivider_table(9) — Kernel API Manual ✨

okay so bestie, buckle up, because we're diving into clk_hw_register_divider_table from the Kernel API Manual (yes, that manual, the one with the truncated name in the header, iykyk 😭). This is the one that registers a table based divider clock with the clock framework, and honestly? it's giving "niche but essential." 🎀

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🌸 NAME 🌸

clk_hw_register_divider_table — registers a table based divider clock with the clock framework. periodt. 👑

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⭐ SYNOPSIS ⭐

clk_hw_register_divider_table (dev , name , parent_name , flags , reg ,
shift , width , clk_divider_flags , table , lock );

like, that's the whole call. ten args. no cap. don't skip any of them or it's over for you 💀

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🦋 ARGUMENTS 🦋

• dev — the device that's registering this clock. it's the main character of the registration, tbh 🫶
• name — name of this clock. give her a good one ✨
• parent_name — name of the clock's parent. yep, clocks have parents too, family tree real 🌈
• flags — framework-specific flags. the generic ones, not the divider ones, keep scrolling for those 👀
• reg — register address you're adjusting to set the divider 📍
• shift — number of bits to shift the bitfield. bit math era 💅
• width — width of the bitfield. size matters (in bits) 🎀
• clk_divider_flags — divider-specific flags for this clock. yes it's a different flags argument than flags, don't come for me 😭
• table — array of divider/value pairs, and it ends with a div set to 0. that zero is the little "we're done here" signal, do not forget it 🚩
• lock — shared register lock for this clock. sharing is caring, but like, thread-safely 🔒

fr fr, that table needs its div set to 0 terminator or things get weird. the manpage said it, i'm just relaying it 💖

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👑 SEE ALSO 👑

Kernel file: ./include/linux/clk-provider.h — the source of truth, go say hi 🧚

• clk framework flags(9)
• struct clk_rate_request(9)
• struct clk_duty(9)
• struct clk_spread_spectrum(9)
• struct clk_ops(9)
• struct clk_parent_data(9)
• struct clk_init_data(9)
• struct clk_hw(9)
• struct clk_fixed_rate(9)
• clk_hw_register_fixed_rate(9)
• devm_clk_hw_register_fixed_rate(9)
• devm_clk_hw_register_fixed_rate_parent_data(9)
• clk_hw_register_fixed_rate_parent_hw(9)
• clk_hw_register_fixed_rate_parent_data(9)
• clk_hw_register_fixed_rate_with_accuracy(9)
• clk_hw_register_fixed_rate_with_accuracy_parent_hw(9)
• clk_hw_register_fixed_rate_with_accuracy_parent_data(9)
• clk_hw_register_fixed_rate_parent_accuracy(9)
• struct clk_gate(9)
• clk_hw_register_gate(9)
• clk_hw_register_gate_parent_hw(9)
• clk_hw_register_gate_parent_data(9)
• devm_clk_hw_register_gate(9)
• devm_clk_hw_register_gate_parent_hw(9)
• devm_clk_hw_register_gate_parent_data(9)
• struct clk_divider(9)
• clk_register_divider(9)
• clk_hw_register_divider(9)
• clk_hw_register_divider_parent_hw(9)
• clk_hw_register_divider_parent_data(9)
• clk_hw_register_divider_table_parent_hw(9)
• clk_hw_register_divider_table_parent_data(9)
• devm_clk_hw_register_divider(9)
• devm_clk_hw_register_divider_parent_hw(9)
• devm_clk_hw_register_divider_parent_data(9)
• devm_clk_hw_register_divider_table(9)
• struct clk_mux(9)
• struct clk_fixed_factor(9)
• devm_clk_hw_register_fixed_factor_parent_hw(9)
• struct clk_fractional_divider(9)
• struct clk_multiplier(9)
• clk_hw_get_dev(9)
• clk_hw_get_of_node(9)

like, that's a whole friend group. divs, gates, muxes, fixed factors, fractional dividers, multipliers — everybody's here and they all ate 🔥

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this has been your girl signing off from ./include/linux, the October 2026 edition of the Kernel API Manual, page clk_hw_regi...ivider_table(9) (name still truncated, still iconic, we stan a mysterious queen 💜). now go register that divider clock, bestie — you got this 🫶✨