devm_clk_hw_register_gate(9)
β¨ devm_clk_hw_register_gate(9) β¨
okay so bestie, this is straight from the Kernel API Manual β and it's literally the page for devm_clk_hw_register_gate. It's giving main character energy, and the vibe is: register a gate clock with the clock framework. π°οΈπ
πΈ NAME πΈ
devm_clk_hw_register_gate β register a gate clock with the clock framework.
β¨ SYNOPSIS β¨
devm_clk_hw_register_gate (dev , name , parent_name , flags , reg ,
bit_idx , clk_gate_flags , lock );
π ARGUMENTS π
okay here's the cast of characters, no cap:
devβ device that is registering this clock π«Άnameβ name of this clock β¨parent_nameβ name of this clock's parent πΈflagsβ framework-specific flags for this clock π©regβ register address to control gating of this clock πbit_idxβ which bit in the register controls gating of this clock π’clk_gate_flagsβ gate-specific flags for this clock ποΈlockβ shared register lock for this clock π
π SEE ALSO π
the whole reference squad, lowkey fr fr:
- Kernel file
./include/linux/clk-provider.hclk framework flags(9) struct clk_rate_request(9)struct clk_duty(9)struct clk_spread_spectrum(9)struct clk_ops(9)struct clk_parent_data(9)struct clk_init_data(9)struct clk_hw(9)struct clk_fixed_rate(9)clk_hw_register_fixed_rate(9)devm_clk_hw_register_fixed_rate(9)devm_clk_hw_register_fixed_rate_parent_data(9)clk_hw_register_fixed_rate_parent_hw(9)clk_hw_register_fixed_rate_parent_data(9)clk_hw_register_fixed_rate_with_accuracy(9)clk_hw_register_fixed_rate_with_accuracy_parent_hw(9)clk_hw_register_fixed_rate_with_accuracy_parent_data(9)clk_hw_register_fixed_rate_parent_accuracy(9)struct clk_gate(9)clk_hw_register_gate(9)clk_hw_register_gate_parent_hw(9)clk_hw_register_gate_parent_data(9)devm_clk_hw_register_gate_parent_hw(9)devm_clk_hw_register_gate_parent_data(9)struct clk_divider(9)clk_register_divider(9)clk_hw_register_divider(9)clk_hw_register_divider_parent_hw(9)clk_hw_register_divider_parent_data(9)clk_hw_register_divider_table(9)clk_hw_register_divider_table_parent_hw(9)clk_hw_register_divider_table_parent_data(9)devm_clk_hw_register_divider(9)devm_clk_hw_register_divider_parent_hw(9)devm_clk_hw_register_divider_parent_data(9)devm_clk_hw_register_divider_table(9)struct clk_mux(9)struct clk_fixed_factor(9)devm_clk_hw_register_fixed_factor_parent_hw(9)struct clk_fractional_divider(9)struct clk_multiplier(9)clk_hw_get_dev(9)clk_hw_get_of_node(9)
source: ./include/linux Β· date: October 2026 Β· page: devm_clk_hw_register_gate(9) β mwah, periodt π
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms