clk_hw_regi...er_parent_hw(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

🌸 clk_hw_register_divider_parent_hw β€” NAME ✨

okay so bestie, this is the Kernel API Manual page for clk_hw_register_divider_parent_hw β€” and what it does is register a divider clock with the clock framework πŸ’… that's the whole vibe, that's the whole function.


πŸŽ€ SYNOPSIS

clk_hw_register_divider_parent_hw (dev , name , parent_hw , flags , reg
, shift , width , clk_divider_flags , lock );

like, nine arguments, no cap. she's a lot but she's worth it 🫢


πŸ’– ARGUMENTS

  • dev β€” the device that's registering this clock, iykyk. it's giving "who do I belong to."
  • name β€” the name of this clock ✨ literally just what you're gonna call her.
  • parent_hw β€” pointer to the parent clk 🌈 your clock's mom, basically.
  • flags β€” framework-specific flags. the general-purpose ones, not the divider ones, keep that distinction bestie πŸ’€
  • reg β€” the register address you're adjusting the divider in. where the magic happens.
  • shift β€” number of bits to shift the bitfield. shift her, slay πŸ’…
  • width β€” width of the bitfield. how thicc the field is, respectfully.
  • clk_divider_flags β€” divider-specific flags for this clock πŸŽ€ these are the divider ones, not the framework ones, don't mix them up pls.
  • lock β€” the shared register lock for this clock πŸ”’ sharing is caring, but also safety.

πŸ¦‹ SEE ALSO

okay so the rabbit hole is deep, buckle up buttercup, every single one of these:

Kernel file ./include/linux/clk-provider.h

clk framework flags(9), struct clk_rate_request(9), struct clk_duty(9), struct clk_spread_spectrum(9), struct clk_ops(9), struct clk_parent_data(9), struct clk_init_data(9), struct clk_hw(9), struct clk_fixed_rate(9), clk_hw_register_fixed_rate(9), devm_clk_hw_register_fixed_rate(9), devm_clk_hw_register_fixed_rate_parent_data(9), clk_hw_register_fixed_rate_parent_hw(9), clk_hw_register_fixed_rate_parent_data(9), clk_hw_register_fixed_rate_with_accuracy(9), clk_hw_register_fixed_rate_with_accuracy_parent_hw(9), clk_hw_register_fixed_rate_with_accuracy_parent_data(9), clk_hw_register_fixed_rate_parent_accuracy(9), struct clk_gate(9), clk_hw_register_gate(9), clk_hw_register_gate_parent_hw(9), clk_hw_register_gate_parent_data(9), devm_clk_hw_register_gate(9), devm_clk_hw_register_gate_parent_hw(9), devm_clk_hw_register_gate_parent_data(9), struct clk_divider(9), clk_register_divider(9), clk_hw_register_divider(9), clk_hw_register_divider_parent_data(9), clk_hw_register_divider_table(9), clk_hw_register_divider_table_parent_hw(9), clk_hw_register_divider_table_parent_data(9), devm_clk_hw_register_divider(9), devm_clk_hw_register_divider_parent_hw(9), devm_clk_hw_register_divider_parent_data(9), devm_clk_hw_register_divider_table(9), struct clk_mux(9), struct clk_fixed_factor(9), devm_clk_hw_register_fixed_factor_parent_hw(9), struct clk_fractional_divider(9), struct clk_multiplier(9), clk_hw_get_dev(9), clk_hw_get_of_node(9)

like I said. deep. but honestly iconic of her to be so connected πŸ‘‘


ngl bestie, this one's just registering a divider clock β€” no scary warnings on this page, so go off and register responsibly 🧚

and that's the whole page, periodt πŸ’œ this lil beauty lives over in ./include/linux and it was dated October 2026 β€” catch you in the kernel, bestie, mwah πŸ“πŸ’–

πŸ“¦ where this page comes from