STRUCT CLK_GATE(9)

💖 struct clk_gate(9) — Kernel API Manual 💖

okay so this is the Kernel API Manual page for struct clk_gate(9), and it's giving very niche clock-gating main character energy. no cap, bestie, we're getting into it. 🕰️✨

🎀 NAME 🎀

struct clk_gate — gating clock. that's the name, and honestly it ate. 💅

✨ SYNOPSIS ✨

okay so here's the whole struct, bestie — copy it exactly, don't come for me about spacing:

       struct clk_gate {
           struct clk_hw hw;
           void __iomem    *reg;
           u8 bit_idx;
           u8 flags;
           spinlock_t *lock;
        };

yes it has spinlock_t *lock; at the end. locked-in queen behavior, we love to see it. 🔒

🫶 Members 🫶

okay so the members are literally:

• hw — handle between common and hardware-specific interfaces. it's the bridge bestie 🌉
• reg — register controlling gate. the gate's remote control, fr fr 🎛️
• bit_idx — single bit controlling gate. one bit, one job, iconic ✨
• flags — hardware-specific flags. the little hardware-specific vibe check flags 🚩
• lock — register lock. it's a lock for the register, and that's the whole sentence. 🔒

🌈 Description 🌈

clock which can gate its output. Implements .enable & .disable — yes, both, with the ampersand and everything, periodt. 🕰️

Flags: this is where the real tea is:

• CLK_GATE_SET_TO_DISABLE — by default this clock sets the bit at bit_idx to enable the clock. Setting this flag does the opposite: setting the bit disable the clock and clearing it enables the clock.
• CLK_GATE_HIWORD_MASK — the gate settings are only in lower 16-bit of this register, and mask of gate bits are in higher 16-bit of this register. While setting the gate bits, higher 16-bit should also be updated to indicate changing gate bits.
• CLK_GATE_BIG_ENDIAN — by default little endian register accesses are used for the gate register. Setting this flag makes the register accesses big endian.

🔥 SEE ALSO 🔥

bestie, the crossover list is huge and we're listing every single one, no skipping. iykyk. 📚✨

• Kernel file ./include/linux/clk-provider.h — clk framework flags(9)
• struct clk_rate_request(9)
• struct clk_duty(9)
• struct clk_spread_spectrum(9)
• struct clk_ops(9)
• struct clk_parent_data(9)
• struct clk_init_data(9)
• struct clk_hw(9)
• struct clk_fixed_rate(9)
• clk_hw_register_fixed_rate(9)
• devm_clk_hw_register_fixed_rate(9)
• devm_clk_hw_register_fixed_rate_parent_data(9)
• clk_hw_register_fixed_rate_parent_hw(9)
• clk_hw_register_fixed_rate_parent_data(9)
• clk_hw_register_fixed_rate_with_accuracy(9)
• clk_hw_register_fixed_rate_with_accuracy_parent_hw(9)
• clk_hw_register_fixed_rate_with_accuracy_parent_data(9)
• clk_hw_register_fixed_rate_parent_accuracy(9)
• clk_hw_register_gate(9)
• clk_hw_register_gate_parent_hw(9)
• clk_hw_register_gate_parent_data(9)
• devm_clk_hw_register_gate(9)
• devm_clk_hw_register_gate_parent_hw(9)
• devm_clk_hw_register_gate_parent_data(9)
• struct clk_divider(9)
• clk_register_divider(9)
• clk_hw_register_divider(9)
• clk_hw_register_divider_parent_hw(9)
• clk_hw_register_divider_parent_data(9)
• clk_hw_register_divider_table(9)
• clk_hw_register_divider_table_parent_hw(9)
• clk_hw_register_divider_table_parent_data(9)
• devm_clk_hw_register_divider(9)
• devm_clk_hw_register_divider_parent_hw(9)
• devm_clk_hw_register_divider_parent_data(9)
• devm_clk_hw_register_divider_table(9)
• struct clk_mux(9)
• struct clk_fixed_factor(9)
• devm_clk_hw_register_fixed_factor_parent_hw(9)
• struct clk_fractional_divider(9)
• struct clk_multiplier(9)
• clk_hw_get_dev(9)
• clk_hw_get_of_node(9)

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and that's the whole page, bestie. 💌 source/version vibe: ./include/linux; date: October 2026; page: struct clk_gate(9). mwah, slay, bye. 💅✨