STRUCT CLK_FRACTIONAL_DIVIDER(9)

📦 version 7.3.1, in nixpkgs unstable

💅 struct clk_fractional_divider(9) — the Kernel API Manual, bestie edition 🎀

okay so this is the struct clk_fractional_divider page from the Kernel API Manual, and it's literally the blueprint for an adjustable fractional divider clock. it's giving "I divide clocks by fractions and I do it fabulously" ✨

🌸 NAME 🌸

struct clk_fractional_divider — an adjustable fractional divider clock 💖

✨ SYNOPSIS ✨

here's the whole vibe, no cap:

struct clk_fractional_divider {
    struct clk_hw   hw;
    void __iomem    *reg;
    u8 mshift;
    u8 mwidth;
    u8 nshift;
    u8 nwidth;
    u8 flags;
    void (*approximation)(struct clk_hw *hw, unsigned long rate,
unsigned long *parent_rate, unsigned long *m, unsigned long *n);
    spinlock_t *lock;
 };

🦋 Members 🦋

okay so every field, let's go, in order, periodt:

  • hw — the handle between the common interfaces and the hardware-specific ones 🫶
  • reg — the register that contains the divider
  • mshift — the shift to the numerator bit field
  • mwidth — how wide the numerator bit field is
  • nshift — the shift to the denominator bit field
  • nwidth — how wide the denominator bit field is
  • flags — the little personality settings, and there are three, iykyk:
    • CLK_FRAC_DIVIDER_ZERO_BASED — by default the numerator and denominator are just the value read from the register. if CLK_FRAC_DIVIDER_ZERO_BASED is set, then the numerator and denominator are both the value read plus one. she adds one, that's her whole thing 💅
    • CLK_FRAC_DIVIDER_BIG_ENDIAN — by default little endian register accesses are used for the divider register. setting this flag makes the register accesses big endian. switching teams, iconic 🌈
    • CLK_FRAC_DIVIDER_POWER_OF_TWO_PS — by default the resulting fraction might be saturated and the caller will get quite far from the good enough approximation 😭 instead the caller may require, by setting this flag, to shift left by a few bits in case, when the asked one is quite small to satisfy the desired range of denominator. it assumes that on the caller's side the power-of-two capable prescaler exists. so yeah — prescaler better be there, fr fr 👀
  • approximation — the clk driver's callback for calculating the divider clock. this is where the driver does its math homework 🧮
  • lock — the register lock 🔒

🔥 Description 🔥

a clock with an adjustable fractional divider that affects its output frequency. that's it, that's the whole concept, and honestly? obsessed. 😌✨

👑 SEE ALSO 👑

the whole friend group, in order, and yes we're listing all of them because nobody gets left out at this table 🫶:

Kernel file ./include/linux/clk-provider.h, clk framework flags(9), struct clk_rate_request(9), struct clk_duty(9), struct clk_spread_spectrum(9), struct clk_ops(9), struct clk_parent_data(9), struct clk_init_data(9), struct clk_hw(9), struct clk_fixed_rate(9), clk_hw_register_fixed_rate(9), devm_clk_hw_register_fixed_rate(9), devm_clk_hw_register_fixed_rate_parent_data(9), clk_hw_register_fixed_rate_parent_hw(9), clk_hw_register_fixed_rate_parent_data(9), clk_hw_register_fixed_rate_with_accuracy(9), clk_hw_register_fixed_rate_with_accuracy_parent_hw(9), clk_hw_register_fixed_rate_with_accuracy_parent_data(9), clk_hw_register_fixed_rate_parent_accuracy(9), struct clk_gate(9), clk_hw_register_gate(9), clk_hw_register_gate_parent_hw(9), clk_hw_register_gate_parent_data(9), devm_clk_hw_register_gate(9), devm_clk_hw_register_gate_parent_hw(9), devm_clk_hw_register_gate_parent_data(9), struct clk_divider(9), clk_register_divider(9), clk_hw_register_divider(9), clk_hw_register_divider_parent_hw(9), clk_hw_register_divider_parent_data(9), clk_hw_register_divider_table(9), clk_hw_register_divider_table_parent_hw(9), clk_hw_register_divider_table_parent_data(9), devm_clk_hw_register_divider(9), devm_clk_hw_register_divider_parent_hw(9), devm_clk_hw_register_divider_parent_data(9), devm_clk_hw_register_divider_table(9), struct clk_mux(9), struct clk_fixed_factor(9), devm_clk_hw_register_fixed_factor_parent_hw(9), struct clk_multiplier(9), clk_hw_get_dev(9), clk_hw_get_of_node(9) 💜

ngl bestie, this struct is all about bit fields and flags — mess up a shift or a width and your clock rate is gonna be giving chaos 😭 double-check those mshift / mwidth / nshift / nwidth values before you ship, okay? 🫶

and that's the page!! 🌟 this lil rewrite came from the source path ./include/linux, dated October 2026 — so yeah, that's the version energy we're working with. mwah, go divide some fractions divinely 💅🎀🦋

📦 where this page comes from