pcie_wait_for_link_delay(9)
πΈ NAME πΈ
okay bestie, welcome to the Kernel API Manual page for pcie_wait_for_link_delay(9) β this is the little function that is literally built different when you need to wait until a link is active or inactive. π
β¨
β¨ SYNOPSIS β¨
bool pcie_wait_for_link_delay (struct pci_dev *pdev , bool active , int
delay );
π ARGUMENTS π
pdevβ Bridge device. The bridge in question, no cap.activeβ waiting for active or inactive? yes, the manpage is literally asking the question.delayβ Delay to wait after link has become active (in ms). Keep the milliseconds, bestie.
π DESCRIPTION π
Use this to wait till the link becomes active or inactive. That's the whole assignment β patience era, main character energy, waiting room vibes. π¦
π SEE ALSO π
kernel file is ./drivers/pci/pci.c, and then the whole PCI extended universe pulls up:
pci_bus_max_busnr(9),pci_status_get_and_clear_errors(9),pci_dev_str_match_path(9),pci_dev_str_match(9),pci_find_capability(9)pci_bus_find_capability(9),pci_find_next_ext_capability(9),pci_find_ext_capability(9),pci_get_dsn(9),pci_find_next_ht_capability(9)pci_find_ht_capability(9),pci_find_vsec_capability(9),pci_find_dvsec_capability(9),pci_find_parent_resource(9),pci_find_resource(9)pci_resource_name(9),pci_wait_for_pending(9),pci_request_acs(9),pci_std_enable_acs(9),pci_enable_acs(9)pci_restore_bars(9),pci_update_current_state(9),pci_refresh_power_state(9),pci_platform_power_transition(9),pci_resume_bus(9)pci_power_up(9),pci_set_full_power_state(9),__pci_dev_set_current_state(9),pci_bus_set_current_state(9),pci_set_low_power_state(9)pci_set_power_state(9),pci_save_state(9),pci_restore_state(9),pci_store_saved_state(9),pci_load_saved_state(9)pci_load_and_free_saved_state(9),pci_reenable_device(9),pci_enable_device_mem(9),pci_enable_device(9),pcibios_release_device(9)pcibios_disable_device(9),pci_disable_enabled_device(9),pci_disable_device(9),pcibios_set_pcie_reset_state(9),pci_set_pcie_reset_state(9)pcie_clear_root_pme_status(9),pci_check_pme_status(9),pci_pme_wakeup(9),pci_pme_wakeup_bus(9),pci_pme_capable(9)pci_pme_restore(9),pci_pme_active(9),__pci_enable_wake(9),pci_enable_wake(9),pci_wake_from_d3(9)pci_target_state(9),pci_prepare_to_sleep(9),pci_back_from_sleep(9),pci_finish_runtime_suspend(9),pci_dev_run_wake(9)pci_dev_need_resume(9),pci_dev_adjust_pme(9),pci_dev_complete_resume(9),pci_choose_state(9),pci_suspend_retains_context(9)pci_bridge_d3_possible(9),pci_d3cold_enable(9),pci_d3cold_disable(9),pci_pm_init(9),_pci_add_cap_save_buffer(9)pci_allocate_cap_save_buffers(9),pci_configure_ari(9),pci_acs_enabled(9),pci_acs_path_enabled(9),pci_acs_init(9)pci_enable_atomic_ops_to_root(9),pci_release_region(9),__pci_request_region(9),pci_request_region(9),pci_release_selected_regions(9)pci_request_selected_regions(9),pci_request_selected_regions_exclusive(9),pci_release_regions(9),pci_request_regions(9),pci_request_regions_exclusive(9)pci_remap_iospace(9),pci_unmap_iospace(9),pcibios_setup(9),pcibios_set_master(9),pci_set_master(9)pci_clear_master(9),pci_set_cacheline_size(9),pci_set_mwi(9),pci_try_set_mwi(9),pci_clear_mwi(9)pci_disable_parity(9),pci_intx(9),pci_wait_for_pending_transaction(9),pcie_flr(9),pcie_reset_flr(9)pci_pm_reset(9),pcie_wait_for_link_status(9),pcie_retrain_link(9),pcie_wait_for_link(9),pci_bridge_wait_for_secondary_bus(9)pci_bridge_secondary_bus_reset(9),__pci_reset_function_locked(9),pci_init_reset_methods(9),pci_reset_function(9),pci_reset_function_locked(9)pci_try_reset_function(9),pci_probe_reset_slot(9),pci_try_reset_slot(9),pci_try_reset_bus(9),pci_reset_bridge(9)pci_bus_error_reset(9),pci_probe_reset_bus(9),pci_reset_bus(9),pcix_get_max_mmrbc(9),pcix_get_mmrbc(9)pcix_set_mmrbc(9),pcie_get_readrq(9),pcie_set_readrq(9),pcie_get_mps(9),pcie_set_mps(9)pcie_bandwidth_available(9),pcie_get_supported_speeds(9),pcie_get_speed_cap(9),pcie_get_width_cap(9),pcie_bandwidth_capable(9)__pcie_print_link_status(9),pcie_print_link_status(9),pci_select_bars(9),pci_set_vga_state(9),pci_add_dma_alias(9)pci_real_dma_dev(9),pci_specified_resource_alignment(9),pci_bus_find_emul_domain_nr(9),pci_ext_cfg_avail(9)
and that's the footer tea, bestie: source/version is ./drivers/pci, date is October 2026, and the page tag is pcie_wait_for_link_delay(9) β byeee π«Άππ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms