pci_try_reset_slot(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… pci_try_reset_slot(9) β€” the Kernel API Manual glow-up ✨

okay bestie, so we're in the Kernel API Manual today and the main character of this page is pci_try_reset_slot πŸŽ€ like, it's a function, it's in the kernel, it resets PCI slots, and honestly? iconic.


✨ NAME ✨

pci_try_reset_slot β€” try to reset a PCI slot 🫢 (yes, try. there's lore. keep reading.)


πŸŽ€ SYNOPSIS πŸŽ€

int pci_try_reset_slot (struct pci_slot *slot );

🌸 ARGUMENTS 🌸

  • slot β€” the PCI slot you wanna reset. that's it. that's the argument. the whole thing. πŸ’–

πŸ¦‹ DESCRIPTION πŸ¦‹

okay so picture this: a PCI bus can host multiple slots, right? and each slot may support its own reset mechanism, fully independent of the other slots. no cap. like, some slots support slot power control β€” that's the vibe ✨

and in the case of a 1:1 bus-to-slot architecture, this function may just wrap the bus reset, specifically so you don't get spurious slot-related events β€” hotplug, for example. avoiding drama, we love to see it πŸ™ˆ

generally, a slot reset should be attempted before a bus reset β€” that's the order of operations bestie, write it down πŸŽ€

everything the slot does, plus any subordinate buses sitting behind the slot, all get reset through this function. and here's the cute part: the PCI config space of all devices in the slot and behind the slot is saved before reset and restored after reset. memory? she has it. 🧚

also, straight from the page: Same as above except return -EAGAIN if the slot cannot be locked πŸ”’ β€” like if the lock is busy, she says -EAGAIN and dips. no blocking, no waiting around πŸ’…

πŸ”₯ SEE ALSO πŸ”₯

the kernel file is ./drivers/pci/pci.c, and the girlies linked on this page are... a lot of them. buckle up 🌈

pci_bus_max_busnr(9), pci_status_get_and_clear_errors(9), pci_dev_str_match_path(9), pci_dev_str_match(9), pci_find_capability(9), pci_bus_find_capability(9), pci_find_next_ext_capability(9), pci_find_ext_capability(9), pci_get_dsn(9), pci_find_next_ht_capability(9), pci_find_ht_capability(9), pci_find_vsec_capability(9), pci_find_dvsec_capability(9), pci_find_parent_resource(9), pci_find_resource(9), pci_resource_name(9), pci_wait_for_pending(9), pci_request_acs(9), pci_std_enable_acs(9), pci_enable_acs(9), pci_restore_bars(9), pci_update_current_state(9), pci_refresh_power_state(9), pci_platform_power_transition(9), pci_resume_bus(9), pci_power_up(9), pci_set_full_power_state(9), __pci_dev_set_current_state(9), pci_bus_set_current_state(9), pci_set_low_power_state(9), pci_set_power_state(9), pci_save_state(9), pci_restore_state(9), pci_store_saved_state(9), pci_load_saved_state(9), pci_load_and_free_saved_state(9), pci_reenable_device(9), pci_enable_device_mem(9), pci_enable_device(9), pcibios_release_device(9), pcibios_disable_device(9), pci_disable_enabled_device(9), pci_disable_device(9), pcibios_set_pcie_reset_state(9), pci_set_pcie_reset_state(9), pcie_clear_root_pme_status(9), pci_check_pme_status(9), pci_pme_wakeup(9), pci_pme_wakeup_bus(9), pci_pme_capable(9), pci_pme_restore(9), pci_pme_active(9), __pci_enable_wake(9), pci_enable_wake(9), pci_wake_from_d3(9), pci_target_state(9), pci_prepare_to_sleep(9), pci_back_from_sleep(9), pci_finish_runtime_suspend(9), pci_dev_run_wake(9), pci_dev_need_resume(9), pci_dev_adjust_pme(9), pci_dev_complete_resume(9), pci_choose_state(9), pci_suspend_retains_context(9), pci_bridge_d3_possible(9), pci_d3cold_enable(9), pci_d3cold_disable(9), pci_pm_init(9), _pci_add_cap_save_buffer(9), pci_allocate_cap_save_buffers(9), pci_configure_ari(9), pci_acs_enabled(9), pci_acs_path_enabled(9), pci_acs_init(9), pci_enable_atomic_ops_to_root(9), pci_release_region(9), __pci_request_region(9), pci_request_region(9), pci_release_selected_regions(9), pci_request_selected_regions(9), pci_request_selected_regions_exclusive(9), pci_release_regions(9), pci_request_regions(9), pci_request_regions_exclusive(9), pci_remap_iospace(9), pci_unmap_iospace(9), pcibios_setup(9), pcibios_set_master(9), pci_set_master(9), pci_clear_master(9), pci_set_cacheline_size(9), pci_set_mwi(9), pci_try_set_mwi(9), pci_clear_mwi(9), pci_disable_parity(9), pci_intx(9),

pci_wait_for_pending_transaction(9), pcie_flr(9), pcie_reset_flr(9), pci_pm_reset(9), pcie_wait_for_link_status(9), pcie_retrain_link(9), pcie_wait_for_link_delay(9), pcie_wait_for_link(9), pci_bridge_wait_for_secondary_bus(9), pci_bridge_secondary_bus_reset(9), __pci_reset_function_locked(9), pci_init_reset_methods(9), pci_reset_function(9), pci_reset_function_locked(9), pci_try_reset_function(9), pci_probe_reset_slot(9), pci_try_reset_bus(9), pci_reset_bridge(9), pci_bus_error_reset(9), pci_probe_reset_bus(9), pci_reset_bus(9), pcix_get_max_mmrbc(9), pcix_get_mmrbc(9), pcix_set_mmrbc(9), pcie_get_readrq(9), pcie_set_readrq(9), pcie_get_mps(9), pcie_set_mps(9), pcie_bandwidth_available(9), pcie_get_supported_speeds(9), pcie_get_speed_cap(9), pcie_get_width_cap(9), pcie_bandwidth_capable(9), __pcie_print_link_status(9), pcie_print_link_status(9), pci_select_bars(9), pci_set_vga_state(9), pci_add_dma_alias(9), pci_real_dma_dev(9), pci_specified_resource_alignment(9), pci_bus_find_emul_domain_nr(9), pci_ext_cfg_avail(9)

yep. all of them. she keeps her friends close πŸ’–


and that's the page, bestie!! 🫢 this lil number lives in ./drivers/pci and it's stamped October 2026 β€” so jot that down, it's basically vintage πŸ’…βœ¨ no cap, go reset something (try first, obviously). πŸŽ€

πŸ“¦ where this page comes from