pcie_get_supported_speeds(9)

💖 bestie, welcome to pcie_get_supported_speeds(9) — Kernel API Manual edition 💖

Okay so this is the <pink>pcie_get_supported_speeds(9)</pink> page from the Kernel API Manual, and it’s literally the “ask the PCIe device what link speeds it supports” function. Main character energy fr fr. 💅

✨ NAME ✨

pcie_get_supported_speeds — query Supported Link Speed Vector. No cap, that’s the whole vibe check. 🦋

🦋 SYNOPSIS 🦋

u8 pcie_get_supported_speeds (struct pci_dev *dev );

🎀 ARGUMENTS 🎀

• dev — PCI device to query. This is the device you’re asking about, bestie. 🫶

🔥 DESCRIPTION 🔥

Query supported link speeds for dev. That’s the assignment. 💖

The Implementation Note in PCIe r6.0 sec 7.5.3.18 recommends determining supported link speeds using the Supported Link Speeds Vector in the Link Capabilities 2 Register (when available). Slay. ✨

Link Capabilities 2 was added in PCIe r3.0, sec 7.8.18. Iconic. 👑

Without Link Capabilities 2, i.e., prior to PCIe r3.0, the Supported Link Speeds field in Link Capabilities is used, and only 2.5 GT/s and 5.0 GT/s speeds were defined. Old-school but valid. 💀

For dev without Supported Link Speed Vector, the field is synthesized from the Max Link Speed field in the Link Capabilities Register. It’s giving “we made it work anyway.” 🌸

💜 RETURN 💜

Supported Link Speeds Vector (+ reserved 0 at LSB). Yes, that reserved 0 at the LSB is part of the package — not a typo, bestie. 😭

🌈 SEE ALSO 🌈

The whole PCIe squad is here, and I’m keeping every single one because we do not skip the group chat. 👑💖

Kernel file ./drivers/pci/pci.c pci_bus_max_busnr(9),
pci_status_get_and_clear_errors(9), pci_dev_str_match_path(9),
pci_dev_str_match(9), pci_find_capability(9),
pci_bus_find_capability(9), pci_find_next_ext_capability(9),
pci_find_ext_capability(9), pci_get_dsn(9),
pci_find_next_ht_capability(9), pci_find_ht_capability(9),
pci_find_vsec_capability(9), pci_find_dvsec_capability(9),
pci_find_parent_resource(9), pci_find_resource(9), pci_resource_name(9),
pci_wait_for_pending(9), pci_request_acs(9), pci_std_enable_acs(9),
pci_enable_acs(9), pci_restore_bars(9), pci_update_current_state(9),
pci_refresh_power_state(9), pci_platform_power_transition(9),
pci_resume_bus(9), pci_power_up(9), pci_set_full_power_state(9),
__pci_dev_set_current_state(9), pci_bus_set_current_state(9),
pci_set_low_power_state(9), pci_set_power_state(9), pci_save_state(9),
pci_restore_state(9), pci_store_saved_state(9), pci_load_saved_state(9),
pci_load_and_free_saved_state(9), pci_reenable_device(9),
pci_enable_device_mem(9), pci_enable_device(9),
pcibios_release_device(9), pcibios_disable_device(9),
pci_disable_enabled_device(9), pci_disable_device(9),
pcibios_set_pcie_reset_state(9), pci_set_pcie_reset_state(9),
pcie_clear_root_pme_status(9), pci_check_pme_status(9),
pci_pme_wakeup(9), pci_pme_wakeup_bus(9), pci_pme_capable(9),
pci_pme_restore(9), pci_pme_active(9), __pci_enable_wake(9),
pci_enable_wake(9), pci_wake_from_d3(9), pci_target_state(9),
pci_prepare_to_sleep(9), pci_back_from_sleep(9),
pci_finish_runtime_suspend(9), pci_dev_run_wake(9),
pci_dev_need_resume(9), pci_dev_adjust_pme(9),
pci_dev_complete_resume(9), pci_choose_state(9),
pci_suspend_retains_context(9), pci_bridge_d3_possible(9),
pci_d3cold_enable(9), pci_d3cold_disable(9), pci_pm_init(9),
_pci_add_cap_save_buffer(9), pci_allocate_cap_save_buffers(9),
pci_configure_ari(9), pci_acs_enabled(9), pci_acs_path_enabled(9),
pci_acs_init(9), pci_enable_atomic_ops_to_root(9),
pci_release_region(9), __pci_request_region(9), pci_request_region(9),
pci_release_selected_regions(9), pci_request_selected_regions(9),
pci_request_selected_regions_exclusive(9), pci_release_regions(9),
pci_request_regions(9), pci_request_regions_exclusive(9),
pci_remap_iospace(9), pci_unmap_iospace(9), pcibios_setup(9),
pcibios_set_master(9), pci_set_master(9), pci_clear_master(9),
pci_set_cacheline_size(9), pci_set_mwi(9), pci_try_set_mwi(9),
pci_clear_mwi(9), pci_disable_parity(9), pci_intx(9),
pci_wait_for_pending_transaction(9), pcie_flr(9), pcie_reset_flr(9),
pci_pm_reset(9), pcie_wait_for_link_status(9), pcie_retrain_link(9),
pcie_wait_for_link_delay(9), pcie_wait_for_link(9),
pci_bridge_wait_for_secondary_bus(9), pci_bridge_secondary_bus_reset(9),
__pci_reset_function_locked(9), pci_init_reset_methods(9),
pci_reset_function(9), pci_reset_function_locked(9),
pci_try_reset_function(9), pci_probe_reset_slot(9),
pci_try_reset_slot(9), pci_try_reset_bus(9), pci_reset_bridge(9),
pci_bus_error_reset(9), pci_probe_reset_bus(9), pci_reset_bus(9),
pcix_get_max_mmrbc(9), pcix_get_mmrbc(9), pcix_set_mmrbc(9),
pcie_get_readrq(9), pcie_set_readrq(9), pcie_get_mps(9),
pcie_set_mps(9), pcie_bandwidth_available(9), pcie_get_speed_cap(9),
pcie_get_width_cap(9), pcie_bandwidth_capable(9),
__pcie_print_link_status(9), pcie_print_link_status(9),
pci_select_bars(9), pci_set_vga_state(9), pci_add_dma_alias(9),
pci_real_dma_dev(9), pci_specified_resource_alignment(9),
pci_bus_find_emul_domain_nr(9), pci_ext_cfg_avail(9)

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That’s the tea, bestie ☕ — source/version: ./drivers/pci, date: October 2026, and the title is pcie_get_supported_speeds(9). Now go query those speeds and slay. 💖🦋✨