pci_pm_reset(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ NAME ✨

Okay so this is pci_pm_reset(9) from the Kernel API Manual, and the whole vibe is literally: put the device into PCI_D3 and back into PCI_D0. Like a little power-nap reset arc, bestie. πŸ’…


🌸 SYNOPSIS 🌸

int pci_pm_reset (struct pci_dev *dev , bool probe );

πŸŽ€ ARGUMENTS πŸŽ€

  • dev β€” the device you're resetting, no cap.
  • probe β€” if true, return 0 if the device can be reset this way.

πŸ¦‹ DESCRIPTION πŸ¦‹

So if dev supports native PCI PM and its PCI_PM_CTRL_NO_SOFT_RESET flag is unset, it will be reinitialized internally when going from PCI_D3hot to PCI_D0. Iconic behavior, honestly.

If that's the case and the device is not in a low-power state already, force it into PCI_D3hot and back to PCI_D0, causing it to be reset. Slay. ✨


πŸ’… NOTE πŸ’…

This causes the caller to sleep for twice the device power transition cooldown period, which for the D0->D3hot and D3hot->D0 transitions is 10 ms by default (i.e. unless the dev's d3hot_delay field has a different value). Moreover, only devices in D0 can be reset by this function.

Like, the sleep is real, and the D0-only rule is real too. Not me warning you twice. 😭


🌈 SEE ALSO 🌈

Kernel file ./drivers/pci/pci.c

And the whole extended PCI friend group, fr fr: pci_bus_max_busnr(9), pci_status_get_and_clear_errors(9), pci_dev_str_match_path(9), pci_dev_str_match(9), pci_find_capability(9), pci_bus_find_capability(9), pci_find_next_ext_capability(9), pci_find_ext_capability(9), pci_get_dsn(9), pci_find_next_ht_capability(9), pci_find_ht_capability(9), pci_find_vsec_capability(9), pci_find_dvsec_capability(9), pci_find_parent_resource(9), pci_find_resource(9), pci_resource_name(9), pci_wait_for_pending(9), pci_request_acs(9), pci_std_enable_acs(9), pci_enable_acs(9), pci_restore_bars(9), pci_update_current_state(9), pci_refresh_power_state(9), pci_platform_power_transition(9), pci_resume_bus(9), pci_power_up(9), pci_set_full_power_state(9), __pci_dev_set_current_state(9), pci_bus_set_current_state(9), pci_set_low_power_state(9), pci_set_power_state(9), pci_save_state(9), pci_restore_state(9), pci_store_saved_state(9), pci_load_saved_state(9), pci_load_and_free_saved_state(9), pci_reenable_device(9), pci_enable_device_mem(9), pci_enable_device(9), pcibios_release_device(9), pcibios_disable_device(9), pci_disable_enabled_device(9), pci_disable_device(9), pcibios_set_pcie_reset_state(9), pci_set_pcie_reset_state(9), pcie_clear_root_pme_status(9), pci_check_pme_status(9), pci_pme_wakeup(9), pci_pme_wakeup_bus(9), pci_pme_capable(9), pci_pme_restore(9), pci_pme_active(9), __pci_enable_wake(9), pci_enable_wake(9), pci_wake_from_d3(9), pci_target_state(9), pci_prepare_to_sleep(9), pci_back_from_sleep(9), pci_finish_runtime_suspend(9), pci_dev_run_wake(9), pci_dev_need_resume(9), pci_dev_adjust_pme(9), pci_dev_complete_resume(9), pci_choose_state(9), pci_suspend_retains_context(9), pci_bridge_d3_possible(9), pci_d3cold_enable(9), pci_d3cold_disable(9), pci_pm_init(9), _pci_add_cap_save_buffer(9), pci_allocate_cap_save_buffers(9), pci_configure_ari(9), pci_acs_enabled(9), pci_acs_path_enabled(9), pci_acs_init(9), pci_enable_atomic_ops_to_root(9), pci_release_region(9), __pci_request_region(9), pci_request_region(9), pci_release_selected_regions(9), pci_request_selected_regions(9), pci_request_selected_regions_exclusive(9), pci_release_regions(9), pci_request_regions(9), pci_request_regions_exclusive(9), pci_remap_iospace(9), pci_unmap_iospace(9), pcibios_setup(9), pcibios_set_master(9), pci_set_master(9), pci_clear_master(9), pci_set_cacheline_size(9), pci_set_mwi(9), pci_try_set_mwi(9), pci_clear_mwi(9), pci_disable_parity(9), pci_intx(9), pci_wait_for_pending_transaction(9), pcie_flr(9), pcie_reset_flr(9), pcie_wait_for_link_status(9), pcie_retrain_link(9), pcie_wait_for_link_delay(9), pcie_wait_for_link(9), pci_bridge_wait_for_secondary_bus(9), pci_bridge_secondary_bus_reset(9), __pci_reset_function_locked(9), pci_init_reset_methods(9), pci_reset_function(9), pci_reset_function_locked(9), pci_try_reset_function(9), pci_probe_reset_slot(9), pci_try_reset_slot(9), pci_try_reset_bus(9), pci_reset_bridge(9), pci_bus_error_reset(9), pci_probe_reset_bus(9), pci_reset_bus(9), pcix_get_max_mmrbc(9), pcix_get_mmrbc(9), pcix_set_mmrbc(9), pcie_get_readrq(9), pcie_set_readrq(9), pcie_get_mps(9), pcie_set_mps(9), pcie_bandwidth_available(9), pcie_get_supported_speeds(9), pcie_get_speed_cap(9), pcie_get_width_cap(9), pcie_bandwidth_capable(9), __pcie_print_link_status(9), pcie_print_link_status(9), pci_select_bars(9), pci_set_vga_state(9), pci_add_dma_alias(9), pci_real_dma_dev(9), pci_specified_resource_alignment(9), pci_bus_find_emul_domain_nr(9), pci_ext_cfg_avail(9)


And that's the tea, bestie πŸ“ β€” source/version ./drivers/pci, date October 2026, and the page is still pci_pm_reset(9). Mwah πŸ’‹

πŸ“¦ where this page comes from