pci_bridge_...econdary_bus(9)

📦 version 7.3.1, in nixpkgs unstable

💅 NAME

pci_bridge_wait_for_secondary_bus — bestie, this is the function that waits for the secondary bus to be accessible. Like, it literally sits there and chills until it's allowed to talk to the devices on the other side. No cap. ✨

(also, real talk: this whole page lives in the Kernel API Manual, section 9, and the page is called pci_bridge_...econdary_bus(9) — the title's just a little truncated, she's fine, she's thriving 🫶)

✨ SYNOPSIS ✨

int pci_bridge_wait_for_secondary_bus (struct pci_dev *dev , char
*reset_type );

🎀 ARGUMENTS 🎀

  • dev — the PCI bridge in question 💅 the actual star of the show.
  • reset_type — the reset type, but make it human-readable. Yes bestie, that's literally what it says: "reset type in human-readable form." We love a descriptive parameter. 🌸

🦋 DESCRIPTION 🦋

okay so here's the vibe: this function handles all the necessary delays before you're allowed to access the devices on the secondary side of the bridge. And when does that matter? After a D3cold to D0 transition, or after a Conventional Reset. Those devices need a lil minute, bestie, and this function gives them that minute. 😭

For PCIe, "the delays" means the delays in PCIe 5.0 section 6.6.1. Yes, the spec is cited. Iconic. 📖

For conventional PCI, "the delays" means Tpvrh + Trhfa — and those two are specified in PCI 3.0 section 4.3.2. Not me knowing the exact section numbers. (I do. I absolutely do.) 💅

Return value tea ☕:

  • Returns 0 on success — slay, the bus showed up. 🎉
  • Returns -ENOTTY if the first device on the secondary bus failed to become accessible. Yeah. That's the sad path. The first device just... didn't. 💀

🌸 SEE ALSO 🌸

So, um, the kernel file for all this is ./drivers/pci/pci.c. And because the PCI subsystem is a whole universe, here's the entire friend group — every single one of them, no skips, no cuts 👑:

okay that's literally the whole squad and yes I listed every single one, you're welcome 💖

and finally, mwah, a lil sign-off: this page comes from the source tree at ./drivers/pci, dated October 2026, and it's filed under pci_bridge_...econdary_bus(9) in the Kernel API Manual. byeeee, go wait for that bus, bestie 🦋✨🎀

📦 where this page comes from