e1000_rar_set_pch2lan(9)
π e1000_rar_set_pch2lan β Kernel API Manual, bestie edition β¨
okay so picture this: you're deep in the e1000 driver, the manual page name is literally e1000_rar_set_pch2lan(9), and you just need to set a receive address register. no cap, that's the whole vibe. let's get into it π«Ά
πΈ NAME πΈ
e1000_rar_set_pch2lan β Set receive address register</p> π
β¨ SYNOPSIS β¨
int e1000_rar_set_pch2lan (struct e1000_hw *hw , u8 *addr , u32 index );
like yes she takes three things and gives you back an int, iconic behavior honestly π
π ARGUMENTS π
hwβ pointer to the HW structure π§ like, the whole hardware situationaddrβ pointer to the receive address π the address itself, pointing at itindexβ receive address array register ποΈ which slot in the array we're talking about
π¦ DESCRIPTION π¦
So what she does: sets the receive address array register at index to the address passed in by addr. clean, simple, no drama π
but here's the tea for 82579 β β RAR[0] is the base address register that is to contain the MAC address, but RAR[1-6] are reserved for manageability (ME). so like, don't touch those, they're taken π. use SHRA[0-3] in place of those reserved for ME instead. periodt. π
π SEE ALSO π
Kernel file ./drivers/net/ethernet/intel/e1000e/ich8lan.c β go read her, she's long but she ate π₯
and now the guest list, literally everyone showed up:
e1000_phy_is_accessible_pchlan(9),e1000_toggle_lanphypc_pch_lpt(9),e1000_reconfigure_k1_params(9),e1000_init_phy_workarounds_pchlan(9),e1000_init_phy_params_pchlan(9),e1000_init_phy_params_ich8lan(9),e1000_init_nvm_params_ich8lan(9),e1000_init_mac_params_ich8lan(9),__e1000_access_emi_reg_locked(9),e1000_read_emi_reg_locked(9),e1000_write_emi_reg_locked(9),e1000_set_eee_pchlan(9),e1000_k1_workaround_lpt_lp(9),e1000_platform_pm_pch_lpt(9),e1000e_force_smbus(9),e1000_enable_ulp_lpt_lp(9),e1000_disable_ulp_lpt_lp(9),e1000_check_for_copper_link_ich8lan(9),e1000_acquire_nvm_ich8lan(9),e1000_release_nvm_ich8lan(9),e1000_acquire_swflag_ich8lan(9),e1000_release_swflag_ich8lan(9),e1000_check_mng_mode_ich8lan(9),e1000_check_mng_mode_pchlan(9),e1000_rar_get_count_pch_lpt(9),e1000_rar_set_pch_lpt(9),e1000_check_reset_block_ich8lan(9),e1000_write_smbus_addr(9),e1000_sw_lcd_config_ich8lan(9),e1000_k1_gig_workaround_hv(9),e1000_configure_k1_ich8lan(9),e1000_oem_bits_config_ich8lan(9),e1000_set_mdio_slow_mode_hv(9),e1000_hv_phy_workarounds_ich8lan(9),e1000_copy_rx_addrs_to_phy_ich8lan(9),e1000_lv_jumbo_workaround_ich8lan(9),e1000_lv_phy_workarounds_ich8lan(9),e1000_k1_workaround_lv(9),e1000_gate_hw_phy_config_ich8lan(9),e1000_lan_init_done_ich8lan(9),e1000_post_phy_reset_ich8lan(9),e1000_phy_hw_reset_ich8lan(9),e1000_set_lplu_state_pchlan(9),e1000_set_d0_lplu_state_ich8lan(9),e1000_set_d3_lplu_state_ich8lan(9),e1000_valid_nvm_bank_detect_ich8lan(9),e1000_read_nvm_spt(9),e1000_read_nvm_ich8lan(9),e1000_flash_cycle_init_ich8lan(9),e1000_flash_cycle_ich8lan(9),e1000_read_flash_dword_ich8lan(9),e1000_read_flash_word_ich8lan(9),e1000_read_flash_byte_ich8lan(9),e1000_read_flash_data_ich8lan(9),e1000_read_flash_data32_ich8lan(9),e1000_write_nvm_ich8lan(9),e1000_update_nvm_checksum_spt(9),e1000_update_nvm_checksum_ich8lan(9),e1000_validate_nvm_checksum_ich8lan(9),e1000e_write_protect_nvm_ich8lan(9),e1000_write_flash_data_ich8lan(9),e1000_write_flash_data32_ich8lan(9),e1000_write_flash_byte_ich8lan(9),e1000_retry_write_flash_dword_ich8lan(9),e1000_retry_write_flash_byte_ich8lan(9),e1000_erase_flash_bank_ich8lan(9),e1000_valid_led_default_ich8lan(9),e1000_id_led_init_pchlan(9),e1000_get_bus_info_ich8lan(9),e1000_reset_hw_ich8lan(9),e1000_init_hw_ich8lan(9),e1000_initialize_hw_bits_ich8lan(9),e1000_setup_link_ich8lan(9),e1000_setup_copper_link_ich8lan(9),e1000_setup_copper_link_pch_lpt(9),e1000_get_link_up_info_ich8lan(9),e1000_kmrn_lock_loss_workaround_ich8lan(9),e1000e_set_kmrn_lock_loss_workaround_ich8lan(9),e1000e_igp3_phy_powerdown_workaround_ich8lan(9),e1000e_gig_downshift_workaround_ich8lan(9),e1000_suspend_workarounds_ich8lan(9),e1000_resume_workarounds_pchlan(9),e1000_cleanup_led_ich8lan(9),e1000_led_on_ich8lan(9),e1000_led_off_ich8lan(9),e1000_setup_led_pchlan(9),e1000_cleanup_led_pchlan(9),e1000_led_on_pchlan(9),e1000_led_off_pchlan(9),e1000_get_cfg_done_ich8lan(9),e1000_power_down_phy_copper_ich8lan(9),e1000_clear_hw_cntrs_ich8lan(9)
and that's the page!! π this lil cutie came from the source ./drivers/net/ethernet/intel/e... and the version/date stamp is October 2026, filed under e1000_rar_set_pch2lan(9) β mwah, go set some registers bestie, you got this ππ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms