e1000_get_bus_info_ich8lan(9)
π e1000_get_bus_info_ich8lan(9) β the Kernel API Manual, bestie edition π
okay so real talk, we're deep in the Kernel API Manual today and the main character is e1000_get_bus_info_ich8lan(9). she's a little function, she's got one job, and she does it. let's get into it β¨
πΈ NAME πΈ
e1000_get_bus_info_ich8lan β literally just "Get/Set the bus type and width." that's the whole vibe. π
π¦ SYNOPSIS π¦
s32 e1000_get_bus_info_ich8lan (struct e1000_hw *hw );
(it returns a s32, she takes a pointer to a struct e1000_hw, and she's gonna do exactly what the NAME section said. no notes. π)
π ARGUMENTS π
hwβ pointer to the HW structure π«Ά that's it. one (1) arg. she's low maintenance like that.
π₯ DESCRIPTION π₯
okay so here's the tea β β ICH8 uses the PCI Express bus, but it does not contain a PCI Express Capability register. so there's nothing to go read to figure out how wide the bus is π not me showing up expecting a register and getting nothing.
so what happens? the bus width is hard coded. that's right, it's giving "we already know the answer, why would we look it up" energy. hard coded. periodt. π β¨
π SEE ALSO π
and now for the part where I hold up the entire friend group like a proud mom π₯Ή β the kernel file lives at ./drivers/net/ethernet/intel/e1000e/ich8lan.c, and she rolls deep with a lot of siblings, all of them in section (9):
e1000_phy_is_accessible_pchlan(9)e1000_toggle_lanphypc_pch_lpt(9)e1000_reconfigure_k1_params(9)e1000_init_phy_workarounds_pchlan(9)e1000_init_phy_params_pchlan(9)e1000_init_phy_params_ich8lan(9)e1000_init_nvm_params_ich8lan(9)e1000_init_mac_params_ich8lan(9)__e1000_access_emi_reg_locked(9)e1000_read_emi_reg_locked(9)e1000_write_emi_reg_locked(9)e1000_set_eee_pchlan(9)e1000_k1_workaround_lpt_lp(9)e1000_platform_pm_pch_lpt(9)e1000e_force_smbus(9)e1000_enable_ulp_lpt_lp(9)e1000_disable_ulp_lpt_lp(9)e1000_check_for_copper_link_ich8lan(9)e1000_acquire_nvm_ich8lan(9)e1000_release_nvm_ich8lan(9)e1000_acquire_swflag_ich8lan(9)e1000_release_swflag_ich8lan(9)e1000_check_mng_mode_ich8lan(9)e1000_check_mng_mode_pchlan(9)e1000_rar_set_pch2lan(9)e1000_rar_get_count_pch_lpt(9)e1000_rar_set_pch_lpt(9)e1000_check_reset_block_ich8lan(9)e1000_write_smbus_addr(9)e1000_sw_lcd_config_ich8lan(9)e1000_k1_gig_workaround_hv(9)e1000_configure_k1_ich8lan(9)e1000_oem_bits_config_ich8lan(9)e1000_set_mdio_slow_mode_hv(9)e1000_hv_phy_workarounds_ich8lan(9)e1000_copy_rx_addrs_to_phy_ich8lan(9)e1000_lv_jumbo_workaround_ich8lan(9)e1000_lv_phy_workarounds_ich8lan(9)e1000_k1_workaround_lv(9)e1000_gate_hw_phy_config_ich8lan(9)e1000_lan_init_done_ich8lan(9)e1000_post_phy_reset_ich8lan(9)e1000_phy_hw_reset_ich8lan(9)e1000_set_lplu_state_pchlan(9)e1000_set_d0_lplu_state_ich8lan(9)e1000_set_d3_lplu_state_ich8lan(9)e1000_valid_nvm_bank_detect_ich8lan(9)e1000_read_nvm_spt(9)e1000_read_nvm_ich8lan(9)e1000_flash_cycle_init_ich8lan(9)e1000_flash_cycle_ich8lan(9)e1000_read_flash_dword_ich8lan(9)e1000_read_flash_word_ich8lan(9)e1000_read_flash_byte_ich8lan(9)e1000_read_flash_data_ich8lan(9)e1000_read_flash_data32_ich8lan(9)e1000_write_nvm_ich8lan(9)e1000_update_nvm_checksum_spt(9)e1000_update_nvm_checksum_ich8lan(9)e1000_validate_nvm_checksum_ich8lan(9)e1000e_write_protect_nvm_ich8lan(9)e1000_write_flash_data_ich8lan(9)e1000_write_flash_data32_ich8lan(9)e1000_write_flash_byte_ich8lan(9)e1000_retry_write_flash_dword_ich8lan(9)e1000_retry_write_flash_byte_ich8lan(9)e1000_erase_flash_bank_ich8lan(9)e1000_valid_led_default_ich8lan(9)e1000_id_led_init_pchlan(9)e1000_reset_hw_ich8lan(9)e1000_init_hw_ich8lan(9)e1000_initialize_hw_bits_ich8lan(9)e1000_setup_link_ich8lan(9)e1000_setup_copper_link_ich8lan(9)e1000_setup_copper_link_pch_lpt(9)e1000_get_link_up_info_ich8lan(9)e1000_kmrn_lock_loss_workaround_ich8lan(9)e1000e_set_kmrn_lock_loss_workaround_ich8lan(9)e1000e_igp3_phy_powerdown_workaround_ich8lan(9)e1000e_gig_downshift_workaround_ich8lan(9)e1000_suspend_workarounds_ich8lan(9)e1000_resume_workarounds_pchlan(9)e1000_cleanup_led_ich8lan(9)e1000_led_on_ich8lan(9)e1000_led_off_ich8lan(9)e1000_setup_led_pchlan(9)e1000_cleanup_led_pchlan(9)e1000_led_on_pchlan(9)e1000_led_off_pchlan(9)e1000_get_cfg_done_ich8lan(9)e1000_power_down_phy_copper_ich8lan(9)e1000_clear_hw_cntrs_ich8lan(9)
like I said. she knows everyone. iykyk ππ
ngl that's the entire page, bestie β one arg, one hard-coded bus width, zero PCI Express Capability registers. short and iconic, genuinely.
and that's a wrap on this one, fr fr π the page comes to you courtesy of ./drivers/net/ethernet/intel/e... and it's dated October 2026, so mark your calendars and stan responsibly π§ββοΈβπ
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms