e1000_read_...ta32_ich8lan(9)
πΈ NAME πΈ
okay so this is the Kernel API Manual page for e1000_read_flash_data32_ich8lan, and the header is the truncated e1000_read_...ta32_ich8lan(9) β she reads a dword from NVM, no cap. π
β¨ SYNOPSIS β¨
s32 e1000_read_flash_data32_ich8lan (struct e1000_hw *hw , u32 offset , u32 *data );
π ARGUMENTS π
hwβ pointer to the HW structure, bestie.offsetβ the offset (in bytes) of the dword to read. bytes, not vibes.dataβ pointer to the dword where the value read gets stored.
π¦ DESCRIPTION π¦
Reads a byte or word from the NVM using the flash access registers. That is literally the whole description, and yes, it says byte or word even though the NAME says dword β Iβm just reporting what the page says. β¨
π SEE ALSO π
Kernel file: ./drivers/net/ethernet/intel/e1000e/ich8lan.c β go read the source, iykyk. π«Ά
the whole cast:
e1000_phy_is_accessible_pchlan(9)e1000_toggle_lanphypc_pch_lpt(9)e1000_reconfigure_k1_params(9)e1000_init_phy_workarounds_pchlan(9)e1000_init_phy_params_pchlan(9)e1000_init_phy_params_ich8lan(9)e1000_init_nvm_params_ich8lan(9)e1000_init_mac_params_ich8lan(9)__e1000_access_emi_reg_locked(9)e1000_read_emi_reg_locked(9)e1000_write_emi_reg_locked(9)e1000_set_eee_pchlan(9)e1000_k1_workaround_lpt_lp(9)e1000_platform_pm_pch_lpt(9)e1000e_force_smbus(9)e1000_enable_ulp_lpt_lp(9)e1000_disable_ulp_lpt_lp(9)e1000_check_for_copper_link_ich8lan(9)e1000_acquire_nvm_ich8lan(9)e1000_release_nvm_ich8lan(9)e1000_acquire_swflag_ich8lan(9)e1000_release_swflag_ich8lan(9)e1000_check_mng_mode_ich8lan(9)e1000_check_mng_mode_pchlan(9)e1000_rar_set_pch2lan(9)e1000_rar_get_count_pch_lpt(9)e1000_rar_set_pch_lpt(9)e1000_check_reset_block_ich8lan(9)e1000_write_smbus_addr(9)e1000_sw_lcd_config_ich8lan(9)e1000_k1_gig_workaround_hv(9)e1000_configure_k1_ich8lan(9)e1000_oem_bits_config_ich8lan(9)e1000_set_mdio_slow_mode_hv(9)e1000_hv_phy_workarounds_ich8lan(9)e1000_copy_rx_addrs_to_phy_ich8lan(9)e1000_lv_jumbo_workaround_ich8lan(9)e1000_lv_phy_workarounds_ich8lan(9)e1000_k1_workaround_lv(9)e1000_gate_hw_phy_config_ich8lan(9)e1000_lan_init_done_ich8lan(9)e1000_post_phy_reset_ich8lan(9)e1000_phy_hw_reset_ich8lan(9)e1000_set_lplu_state_pchlan(9)e1000_set_d0_lplu_state_ich8lan(9)e1000_set_d3_lplu_state_ich8lan(9)e1000_valid_nvm_bank_detect_ich8lan(9)e1000_read_nvm_spt(9)e1000_read_nvm_ich8lan(9)e1000_flash_cycle_init_ich8lan(9)e1000_flash_cycle_ich8lan(9)e1000_read_flash_dword_ich8lan(9)e1000_read_flash_word_ich8lan(9)e1000_read_flash_byte_ich8lan(9)e1000_read_flash_data_ich8lan(9)e1000_write_nvm_ich8lan(9)e1000_update_nvm_checksum_spt(9)e1000_update_nvm_checksum_ich8lan(9)e1000_validate_nvm_checksum_ich8lan(9)e1000e_write_protect_nvm_ich8lan(9)e1000_write_flash_data_ich8lan(9)e1000_write_flash_data32_ich8lan(9)e1000_write_flash_byte_ich8lan(9)e1000_retry_write_flash_dword_ich8lan(9)e1000_retry_write_flash_byte_ich8lan(9)e1000_erase_flash_bank_ich8lan(9)e1000_valid_led_default_ich8lan(9)e1000_id_led_init_pchlan(9)e1000_get_bus_info_ich8lan(9)e1000_reset_hw_ich8lan(9)e1000_init_hw_ich8lan(9)e1000_initialize_hw_bits_ich8lan(9)e1000_setup_link_ich8lan(9)e1000_setup_copper_link_ich8lan(9)e1000_setup_copper_link_pch_lpt(9)e1000_get_link_up_info_ich8lan(9)e1000_kmrn_lock_loss_workaround_ich8lan(9)e1000e_set_kmrn_lock_loss_workaround_ich8lan(9)e1000e_igp3_phy_powerdown_workaround_ich8lan(9)e1000e_gig_downshift_workaround_ich8lan(9)e1000_suspend_workarounds_ich8lan(9)e1000_resume_workarounds_pchlan(9)e1000_cleanup_led_ich8lan(9)e1000_led_on_ich8lan(9)e1000_led_off_ich8lan(9)e1000_setup_led_pchlan(9)e1000_cleanup_led_pchlan(9)e1000_led_on_pchlan(9)e1000_led_off_pchlan(9)e1000_get_cfg_done_ich8lan(9)e1000_power_down_phy_copper_ich8lan(9)e1000_clear_hw_cntrs_ich8lan(9)
okay thatβs the page! The footer says source/version ./drivers/net/ethernet/intel/e... and date October 2026, with e1000_read_...ta32_ich8lan(9) chilling on the right. mwah πβ¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms