section 9 · Kernel routines 🧠

87928 pages · page 356 of 440

all 9 (85608)9freebsd (2304)9lua (4)9p (12)

S (continued)

struct mtk_video_enc_buf(9)Private data related to each VB2 buffer.✨
struct mtk_vpu(9)vpu driver data✨
struct mtk_xfi_tphy(9)run-time data of the XFI phy instance✨
struct mtu3(9)device driver instance data.✨
struct mtu3_ep(9)common mtu3 endpoint description✨
struct mtu3_fifo_info(9)HW FIFO description and management data✨
struct mtu3_gpd_ring(9)GPD ring descriptor✨
struct mu3c_ippc_regs(9)MTK ssusb ip port control registers @ip_pw_ctr0~3: ip power and clock control registers @ip_pw_sts1~2: ip power and clock status registers✨
struct mu3h_sch_bw_info(9)schedule information for bandwidth domain✨
struct mu3h_sch_ep_info(9)schedule information for endpoint✨
struct mu3h_sch_tt(9)TT scheduling data✨
struct multi_cs_completion(9)multi CS wait completion.✨
struct multi_cs_data(9)internal data for multi CS call✨
struct musb_io(9)IO functions for MUSB✨
struct musb_platform_ops(9)Operations passed to musb_core by HW glue layer✨
struct mux_acb(9)Structure of Temporary ACB state.✨
struct mux_acbh(9)Structure of the Aggregated Command Block Header.✨
struct mux_adb(9)Structure of State of a single UL data block.✨
struct mux_adbh(9)Structure of the Aggregated Data Block Header.✨
struct mux_adgh(9)Aggregated Datagram Header.✨
struct mux_adth(9)Structure of the Aggregated Datagram Table Header.✨
struct mux_adth_dg(9)Structure of the datagram in the Aggregated Datagram Table Header.✨
struct mux_chip(9)Represents a chip holding mux controllers.✨
struct mux_cmdh(9)Structure of Command Header.✨
struct mux_control(9)Represents a mux controller.✨
struct mux_control_ops(9)Mux controller operations for a mux chip.✨
struct mux_lite_cmdh(9)MUX Lite Command Header✨
struct mux_lite_vfl(9)value field in generic table✨
struct mux_qlth(9)Structure of Aggregated Datagram Queue Level Table Header.✨
struct mux_qlth_ql(9)Structure of the queue level in the Aggregated Datagram Queue Level Table Header.✨
struct mux_state(9)Represents a mux controller state specific to a given consumer.✨
struct mv88e6xxx_devlink_stu_entry(9)Devlink STU entry✨
struct mv88e6xxx_devlink_vtu_entry(9)Devlink VTU entry✨
struct mv_cesa_ahash_dma_req(9)DMA hash request✨
struct mv_cesa_ahash_req(9)hash request✨
struct mv_cesa_ahash_std_req(9)standard hash request✨
struct mv_cesa_caps(9)CESA device capabilities✨
struct mv_cesa_ctx(9)CESA operation context✨
struct mv_cesa_dev(9)CESA device✨
struct mv_cesa_dev_dma(9)DMA pools✨
struct mv_cesa_dma_iter(9)crypto operation iterator✨
struct mv_cesa_engine(9)CESA engine✨
struct mv_cesa_hash_ctx(9)CESA hash operation context✨
struct mv_cesa_hash_op_ctx(9)hash or hmac operation context✨
struct mv_cesa_op_ctx(9)crypto operation context✨
struct mv_cesa_req(9)CESA request✨
struct mv_cesa_req_ops(9)CESA request operations✨
struct mv_cesa_sec_accel_desc(9)security accelerator descriptor✨
struct mv_cesa_sg_dma_iter(9)scatter-gather iterator✨
struct mv_cesa_sg_std_iter(9)CESA scatter-gather iterator for standard requests✨
struct mv_cesa_skcipher_op_ctx(9)cipher operation context✨
struct mv_cesa_skcipher_req(9)cipher request✨
struct mv_cesa_skcipher_std_req(9)cipher standard request✨
struct mv_cesa_tdma_chain(9)TDMA chain✨
struct mv_cesa_tdma_desc(9)TDMA descriptor✨
struct mv_xor_chan(9)internal representation of a XOR channel✨
struct mv_xor_desc_slot(9)software descriptor✨
struct mv_xor_v2_descriptor(9)DMA HW descriptor✨
struct mv_xor_v2_device(9)implements a xor device✨
struct mv_xor_v2_sw_desc(9)implements a xor SW descriptor✨
struct mvebu_a3700_utmi(9)PHY driver data✨
struct mvebu_a3700_utmi_caps(9)PHY capabilities✨
struct mvebu_cp110_utmi(9)PHY driver data✨
struct mvebu_cp110_utmi_port(9)PHY port data✨
struct mvebu_mpp_ctrl(9)describe a mpp control✨
struct mvebu_mpp_ctrl_data(9)private data for the mpp ctrl operations✨
struct mvebu_mpp_ctrl_setting(9)describe a mpp ctrl setting✨
struct mvebu_mpp_mode(9)link ctrl and settings✨
struct mvebu_pinctrl_soc_info(9)SoC specific info passed to pinctrl- mvebu✨
struct mvm_statistics_load(9)RX statistics for multi-queue devices✨
struct mvm_statistics_rx_non_phy(9)non-PHY RX statistics✨
struct mxc_jpeg_fmt(9)driver's internal color format data✨
struct mxc_jpeg_sof(9)JPEG Start Of Frame marker fields✨
struct mxc_jpeg_sof_comp(9)JPEG Start Of Frame component fields✨
struct mxc_jpeg_sos(9)JPEG Start Of Scan marker fields✨
struct mxc_jpeg_sos_comp(9)JPEG Start Of Scan component fields✨
struct mxl862xx_bridge_alloc(9)Bridge Allocation✨
struct mxl862xx_bridge_config(9)Bridge Configuration✨
struct mxl862xx_bridge_port_alloc(9)Bridge Port Allocation✨
struct mxl862xx_bridge_port_config(9)Bridge Port Configuration✨
struct mxl862xx_cfg(9)Global Switch configuration Attributes✨
struct mxl862xx_ctp_port_assignment(9)CTP Port Assignment/association with logical port✨
struct mxl862xx_evlan_block(9)Per-port per-direction extended VLAN block✨
struct mxl862xx_extendedvlan_alloc(9)Extended VLAN block allocation✨
struct mxl862xx_extendedvlan_config(9)Extended VLAN entry configuration✨
struct mxl862xx_extendedvlan_filter(9)Extended VLAN filter configuration✨
struct mxl862xx_extendedvlan_filter_vlan(9)Per-tag filter in Extended VLAN✨
struct mxl862xx_extendedvlan_treatment(9)Extended VLAN treatment✨
struct mxl862xx_extendedvlan_treatment_vlan(9)Per-tag treatment in Extended VLAN✨
struct mxl862xx_fw_version(9)firmware version for comparison and display✨
struct mxl862xx_mac_table_add(9)MAC Table Entry to be added✨
struct mxl862xx_mac_table_clear(9)MAC table clear✨
struct mxl862xx_mac_table_query(9)MAC Table Entry key-based lookup✨
struct mxl862xx_mac_table_read(9)MAC Table Entry to be read✨
struct mxl862xx_mac_table_remove(9)MAC Table Entry to be removed✨
struct mxl862xx_pcs(9)link SerDes interfaces to bridge ports✨
struct mxl862xx_pmapper(9)P-mapper Configuration✨
struct mxl862xx_port(9)per-port state tracked by the driver✨
struct mxl862xx_port_stats(9)64-bit accumulated hardware port statistics✨
struct mxl862xx_priv(9)driver private data for an MxL862xx switch✨
struct mxl862xx_qos_meter_cfg(9)Rate meter configuration✨
struct mxl862xx_register_mod(9)Register access parameter to directly modify internal registers✨
struct mxl862xx_rmon_port_cnt(9)RMON counters for a port✨
struct mxl862xx_ss_sp_tag(9)Special tag port settings✨
struct mxl862xx_stp_port_cfg(9)Configures the Spanning Tree Protocol state✨
struct mxl862xx_sys_fw_image_version(9)Firmware version information✨
struct mxl862xx_vf_block(9)Per-port VLAN Filter block✨
struct mxl862xx_vf_vid(9)Per-VID entry within a VLAN Filter block✨
struct mxl862xx_vlanfilter_alloc(9)VLAN Filter block allocation✨
struct mxl862xx_vlanfilter_config(9)VLAN Filter entry configuration✨
struct mxl862xx_xpcs_an_restart(9)AN restart parameters✨
struct mxl862xx_xpcs_pcs_cfg(9)PCS configuration parameters✨
struct mxl862xx_xpcs_pcs_disable(9)PCS disable parameters✨
struct mxl862xx_xpcs_pcs_link_up(9)PCS link-up parameters✨
struct mxl862xx_xpcs_pcs_state(9)PCS link state✨
struct mxs_i2c_dev(9)per device, private MXS-I2C data✨
struct mxs_lradc(9)✨
struct n_hdlc(9)per device instance data structure✨
struct name_table(9)table containing all existing port name publications✨
struct nand_bbt(9)bad block table object✨
struct nand_bbt_descr(9)bad block table descriptor✨
struct nand_chip(9)NAND Private Flash Chip Data✨
struct nand_chip_ops(9)NAND chip operations✨
struct nand_controller(9)Structure used to describe a NAND controller✨
struct nand_controller_ops(9)Controller operations✨
struct nand_device(9)NAND device✨
struct nand_ecc(9)Information relative to the ECC✨
struct nand_ecc_caps(9)capability of ECC engine✨
struct nand_ecc_context(9)Context for the ECC engine✨
struct nand_ecc_ctrl(9)Control structure for ECC✨
struct nand_ecc_engine(9)ECC engine abstraction for NAND devices✨
struct nand_ecc_engine_ops(9)ECC engine operations✨
struct nand_ecc_props(9)NAND ECC properties✨
struct nand_ecc_req_tweak_ctx(9)Help for automatically tweaking requests✨
struct nand_ecc_step_info(9)ECC step information of ECC engine✨
struct nand_ecc_sw_bch_conf(9)private software BCH ECC engine structure✨
struct nand_ecc_sw_hamming_conf(9)private software Hamming ECC engine structure✨
struct nand_flash_dev(9)NAND Flash Device ID Structure✨
struct nand_id(9)NAND id structure✨
struct nand_interface_config(9)NAND interface timing✨
struct nand_io_iter(9)NAND I/O iterator✨
struct nand_legacy(9)NAND chip legacy fields/hooks✨
struct nand_manufacturer(9)NAND manufacturer structure✨
struct nand_manufacturer_desc(9)NAND Flash Manufacturer descriptor✨
struct nand_manufacturer_ops(9)NAND Manufacturer operations✨
struct nand_memory_organization(9)Memory organization structure✨
struct nand_nvddr_timings(9)NV-DDR NAND chip timings✨
struct nand_op_addr_instr(9)Definition of an address instruction✨
struct nand_op_cmd_instr(9)Definition of a command instruction✨
struct nand_op_data_instr(9)Definition of a data instruction✨
struct nand_op_instr(9)Instruction object✨
struct nand_op_parser(9)NAND controller operation parser descriptor✨
struct nand_op_parser_addr_constraints(9)Constraints for address instructions✨
struct nand_op_parser_ctx(9)Context used by the parser✨
struct nand_op_parser_data_constraints(9)Constraints for data instructions✨
struct nand_op_parser_pattern(9)NAND sub-operation pattern descriptor✨
struct nand_op_parser_pattern_elem(9)One element of a pattern✨
struct nand_op_waitrdy_instr(9)Definition of a wait ready instruction✨
struct nand_operation(9)NAND operation descriptor✨
struct nand_ops(9)NAND operations✨
struct nand_page_io_req(9)NAND I/O request object✨
struct nand_parameters(9)NAND generic parameters from the parameter page✨
struct nand_pos(9)NAND position object✨
struct nand_row_converter(9)Information needed to convert an absolute offset into a row address✨
struct nand_sdr_timings(9)SDR NAND chip timings✨
struct nand_secure_region(9)NAND secure region structure✨
struct nand_subop(9)a sub operation✨
struct nbcon_context(9)Context for console acquire/release✨
struct nbcon_state(9)console state for nbcon consoles✨
struct nbcon_write_context(9)Context handed to the nbcon write callbacks✨
struct nbpf_channel(9)one DMAC channel✨
struct nbpf_desc(9)DMA transfer descriptor✨
struct nd_label_id(9)identifier string for dpa allocation✨
struct nd_namespace_common(9)core infrastructure of a namespace✨
struct nd_namespace_index(9)label set superblock✨
struct nd_namespace_io(9)device representation of a persistent memory range✨
struct nd_namespace_pmem(9)namespace device for dimm-backed interleaved memory✨
struct ne_cpu_pool(9)CPU pool used for Nitro Enclaves.✨
struct ne_devs(9)Data structure to keep refs to the NE misc and PCI devices.✨
struct ne_enclave(9)Per-enclave data used for enclave lifetime management.✨
struct ne_enclave_start_info(9)Setup info necessary for enclave start (in / out).✨
struct ne_image_load_info(9)Info necessary for in-memory enclave image loading (in / out).✨
struct ne_mem_region(9)Entry in the enclave user space memory regions list.✨
struct ne_pci_dev(9)Nitro Enclaves (NE) PCI device.✨
struct ne_pci_dev_cmd_reply(9)NE PCI device command reply.✨
struct ne_phys_contig_mem_regions(9)Contiguous physical memory regions.✨
struct ne_user_mem_region(9)User space memory region set for an enclave.✨
struct ne_user_memory_region(9)Memory region to be set for an enclave (in).✨
struct net_bridge_vlan(9)per-vlan entry✨
struct net_bridge_vlan_group(9)✨
struct net_device(9)The DEVICE structure.✨
struct net_local(9)Our private per device data✨
struct net_prefix(9)Representation of a network prefix.✨
struct net_prefixes(9)A collection of network prefixes.✨
struct net_shaper(9)represents a shaping node on the NIC H/W zeroed field are considered not set.✨
struct net_shaper_ops(9)Operations on device H/W shapers✨
struct netcons_userdata(9)Formatted userdata payload of a target.✨
struct netconsole_target(9)Represents a configured netconsole target.✨
struct netdev_config(9)queue-related configuration for a netdev✨
struct netdev_queue_mgmt_ops(9)netdev ops for queue management✨