STRUCT NAND_NVDDR_TIMINGS(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… struct nand_nvddr_timings β€” NV-DDR NAND chip timings πŸŽ€

okay bestie, welcome to the Kernel API Manual ✨ this is the page for struct nand_nvddr_timings(9), and no cap it's lowkey just a big ol' bag of timing numbers for talking to NV-DDR NAND chips. buckle up πŸ¦‹


🌸 NAME 🌸

struct nand_nvddr_timings β€” the timing requirements of an NV-DDR NAND chip 🫢


✨ SYNOPSIS ✨

here's the whole struct, verbatim, don't touch a single character bestie:

struct nand_nvddr_timings {
    u64 tBERS_max;
    u32 tCCS_min;
    u64 tPROG_max;
    u64 tR_max;
    u32 tAC_min;
    u32 tAC_max;
    u32 tADL_min;
    u32 tCAD_min;
    u32 tCAH_min;
    u32 tCALH_min;
    u32 tCALS_min;
    u32 tCAS_min;
    u32 tCEH_min;
    u32 tCH_min;
    u32 tCK_min;
    u32 tCS_min;
    u32 tDH_min;
    u32 tDQSCK_min;
    u32 tDQSCK_max;
    u32 tDQSD_min;
    u32 tDQSD_max;
    u32 tDQSHZ_max;
    u32 tDQSQ_max;
    u32 tDS_min;
    u32 tDSC_min;
    u32 tFEAT_max;
    u32 tITC_max;
    u32 tQHS_max;
    u32 tRHW_min;
    u32 tRR_min;
    u32 tRST_max;
    u32 tWB_max;
    u32 tWHR_min;
    u32 tWRCK_min;
    u32 tWW_min;
 };

πŸŽ€ Members πŸŽ€

thirty-five fields, and every single one is a whole vibe. let's go πŸ’…

  • tBERS_max β€” block erase time ⏳
  • tCCS_min β€” change column setup time
  • tPROG_max β€” page program time
  • tR_max β€” page read time πŸ“–
  • tAC_min β€” access window of DQ[7:0] from CLK
  • tAC_max β€” access window of DQ[7:0] from CLK (yes, same words as its partner, the datasheet said what it said 🫠)
  • tADL_min β€” ALE to data loading time
  • tCAD_min β€” command, address, data delay
  • tCAH_min β€” command/address DQ hold time
  • tCALH_min β€” W/R_n, CLE and ALE hold time
  • tCALS_min β€” W/R_n, CLE and ALE setup time
  • tCAS_min β€” command/address DQ setup time
  • tCEH_min β€” CE# high hold time
  • tCH_min β€” CE# hold time
  • tCK_min β€” average clock cycle time ⏰
  • tCS_min β€” CE# setup time
  • tDH_min β€” data hold time
  • tDQSCK_min β€” start of the access window of DQS from CLK
  • tDQSCK_max β€” end of the access window of DQS from CLK
  • tDQSD_min β€” min W/R_n low to DQS/DQ driven by device
  • tDQSD_max β€” max W/R_n low to DQS/DQ driven by device
  • tDQSHZ_max β€” W/R_n high to DQS/DQ tri-state by device 🚦
  • tDQSQ_max β€” DQS-DQ skew, DQS to last DQ valid, per access
  • tDS_min β€” data setup time
  • tDSC_min β€” DQS cycle time
  • tFEAT_max β€” busy time for Set Features and Get Features
  • tITC_max β€” interface and timing mode change time πŸ”„
  • tQHS_max β€” data hold skew factor
  • tRHW_min β€” data output cycle to command, address, or data input cycle
  • tRR_min β€” ready to RE# low (data only)
  • tRST_max β€” device reset time, measured from the falling edge of R/B# to the rising edge of R/B#. πŸ‘‘
  • tWB_max β€” WE# high to SR[6] low
  • tWHR_min β€” WE# high to RE# low
  • tWRCK_min β€” W/R_n low to data output cycle
  • tWW_min β€” WP# transition to WE# low

πŸ¦‹ Description πŸ¦‹

so like, this struct defines the timing requirements of a NV-DDR NAND data interface. that's it, that's the whole job 🫑

where do the numbers come from? every NAND datasheet has them, and the timings' meanings are described in the ONFI specifications β€” right here:

https://media-www.micron.com/-/media/client/onfi/specs/onfi_4_1_gold.pdf

specifically chapter 4.18.2 NV-DDR πŸ“Ž (iykyk)

important bestie note: all these timings are expressed in picoseconds. tiny numbers for tiny time, iconic πŸ’œ

🌈 SEE ALSO 🌈

the whole friend group 🫢 go read the kernel file ./include/linux/mtd/rawnand.h and then all of these:

struct nand_parameters(9), struct nand_id(9), struct nand_ecc_step_info(9), struct nand_ecc_caps(9), struct nand_ecc_ctrl(9), struct nand_sdr_timings(9), enum nand_interface_type(9), struct nand_interface_config(9), nand_interface_is_sdr(9), nand_interface_is_nvddr(9), nand_get_sdr_timings(9), nand_get_nvddr_timings(9), struct nand_op_cmd_instr(9), struct nand_op_addr_instr(9), struct nand_op_data_instr(9), struct nand_op_waitrdy_instr(9), enum nand_op_instr_type(9), struct nand_op_instr(9), struct nand_subop(9), struct nand_op_parser_addr_constraints(9), struct nand_op_parser_data_constraints(9), struct nand_op_parser_pattern_elem(9), struct nand_op_parser_pattern(9), struct nand_op_parser(9), struct nand_operation(9), struct nand_controller_ops(9), struct nand_controller(9), struct nand_legacy(9), struct nand_chip_ops(9), struct nand_manufacturer(9), struct nand_secure_region(9), struct nand_chip(9), nand_get_interface_config(9), struct nand_flash_dev(9), nand_opcode_8bits(9), nand_get_data_buf(9)


and that's the page!! πŸ“ this lil masterpiece lives at ./include/linux/mtd and it's from the Kernel API Manual, dated October 2026 β€” like, future vibes fr fr ⭐ mwah, go read your datasheets bestie, ily πŸ’–πŸ§š

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