devm_cxl_add_dport(9)

💅 devm_cxl_add_dport(9) 💅

okay bestie, welcome to the Kernel API Manual entry for devm_cxl_add_dport — yes it's a mouthful, yes it's iconic, and yes we're gonna get through it together 🫶

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✨ NAME ✨

devm_cxl_add_dport — append VH downstream port data to a cxl_port 🌸

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✨ SYNOPSIS ✨

struct cxl_dport * devm_cxl_add_dport (struct cxl_port *port , struct
device *dport_dev , int port_id , resource_size_t component_reg_phys );

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✨ ARGUMENTS ✨

• port — the cxl_port that references this dport 👑
• dport_dev — the firmware or PCI device representing the dport 🦋
• port_id — identifier for this dport in a decoder's target list 💅
• component_reg_phys — optional location of CXL component registers ✨

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✨ DESCRIPTION ✨

okay so real talk, the important note here: dports get appended to the devm release action's of either the port's host (that's for root ports) or the port itself (that's for switch ports). literally that's the whole vibe — pick the right owner and slay 💖

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✨ SEE ALSO ✨

Kernel file ./drivers/cxl/core/port.c 🌈

• cxl core(9)
• devm_cxl_add_port(9)
• devm_cxl_add_rch_dport(9)
• cxl_add_ep(9)
• find_cxl_port_by_dport(9)
• find_cxl_port_by_uport(9)
• cxl_decoder_init(9)
• cxl_root_decoder_alloc(9)
• cxl_switch_decoder_alloc(9)
• cxl_endpoint_decoder_alloc(9)
• cxl_decoder_add_locked(9)
• cxl_decoder_add(9)
• __cxl_driver_register(9)
• cxl_endpoint_get_perf_coordinates(9)

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ngl bestie that's a lot of cross-references — go read them, they're all part of the same friend group 💀💜

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and that's the page!! mwah 😭💅 this one came from ./drivers/cxl/core, dated October 2026, and it's brought to you by the Kernel API Manual — no cap, go forth and add those dports 🎀🦋✨